IEEE 802.11b-1999 Supplement to 802.11-1999,Wireless LAN MAC and PHY specifications: Higher speed Physical Layer (PHY) extension in the 2.4 GHz band
標簽： 802.11 1999 specifications Supplement
上傳時間： 2016-10-02
上傳用戶：wlcaption
802.11b-1999/Cor1-2001, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 2: Higher-speed Physical Layer (PHY) extension in the 2.4 GHz band—Corrigendum1
標簽： Telecommunications Information information technology
上傳時間： 2013-12-10
上傳用戶：gxf2016
IEEE 802.11g-2003 IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 4: Further Higher-Speed Physical Layer Extension in the 2.4 GHz Band
標簽： Telecommunications IEEE Information information
上傳時間： 2016-10-02
上傳用戶：cx111111
IEEE 802.11h-2003 IEEE Standard for Information technology—Telecommunications and Information Exchange Between Systems—LAN/MAN Specific Requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Spectrum and Transmit Power Management Extensions in the 5GHz band in Europe
標簽： Information Telecommunications IEEE technology
上傳時間： 2016-10-02
上傳用戶：lnnn30
// -*- Mode: Verilog -*- // Filename : wb_master.v // Description : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : Unknown, Use with caution! // Description Specification // General Description: 8, 16, 32-bit WISHBONE Master // Supported cycles: MASTER, READ/WRITE // MASTER, BLOCK READ/WRITE // MASTER, RMW // Data port, size: 8, 16, 32-bit // Data port, granularity 8-bit // Data port, Max. operand size 32-bit // Data transfer ordering: little endian // Data transfer sequencing: undefined
標簽： Description Behavorial wb_master Filename
上傳時間： 2014-07-11
上傳用戶：zhanditian
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
RECOMMENDATION ITU-R M.1653*,** Operational and deployment requirements for wireless access systems including radio local area networks in the mobile service to facilitate sharing between these systems and systems in the Earth exploration-satellite service (active) and the space research service (active) in the band 5 470-5 570 MHz within the 5 460 5 725 MHz range
標簽： RECOMMENDATION requirements Operational deployment
上傳時間： 2016-10-21
上傳用戶：miaochun888
iic總線控制器VHDL實現 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
標簽： VHDL c_control vhd control
上傳時間： 2016-10-30
上傳用戶：woshiayin
WLAN仿真－發送機 wlan No Comments 設置完系統參數后，開始產生發送數據。 1. 產生隨機的發送bit（tx_bits），這里不考慮信道編碼。 2. QAM映射 3. 將數據映射到不同載波，形成OFDM符號 4. 產生pilot，并將pilot插入OFDM符號中 5. 加入dc和guard子載波 6. 進行ifft，將頻域信號變到時域，并加入循環前綴 7. 對信號進行overlap window 8. 在時域產生short preamble 9. 在時域產生long preamble 10. 將preamble和數據符號組成packet 11. 升采樣 得到信道傳輸的數據Tx_signal_up 具體程序見附件 wlan_transmitter.m
上傳時間： 2016-11-09
上傳用戶：exxxds
16點FFT VHDL源程序，The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary component of a datum.
上傳時間： 2013-12-20
上傳用戶：yph853211
