keil and proteus聯(lián)合演示顯示效果，可實(shí)現(xiàn)音樂的播放，對初學(xué)者比較有用；很好的例子
標(biāo)簽： proteus keil and 顯示效果
上傳時間： 2013-09-25
上傳用戶：yangqian
Proteus simulation of graphical lcd
標(biāo)簽： simulation graphical Proteus lcd
上傳時間： 2013-09-25
上傳用戶：lyy1234
the practice of proteus and avr
標(biāo)簽： practice proteus the and
上傳時間： 2013-09-29
上傳用戶：tom_man2008
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
標(biāo)簽： Efficient Verilog Digital Coding
上傳時間： 2013-11-22
上傳用戶：han_zh
One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
上傳時間： 2013-10-17
上傳用戶：tb_6877751
Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures， follow the prompts trainers can locate the fault source and confirm the type to accomplish corresponding fault maintenance training. A training evaluation means is given to examining and evaluating the training performance. The system intuitively and vividly shows the fault maintenance process， it can not only be used in teaching， but also in daily maintenance training to efficiently improve the maintenance operation level. Graphical programming language LabVIEW is used to develop the system platform.
標(biāo)簽： 電臺維修 模擬訓(xùn)練 方法研究 系統(tǒng)設(shè)計
上傳時間： 2013-11-19
上傳用戶：3294322651
This application note is an overview discussion of theLinear Technology SPICE macromodel library. It assumeslittle if any prior knowledge of this software library or itshistory. However, it does assume familiarity with both theanalog simulation program SPICE (or one of its manyderivatives), and modern day op amps, including bipolar,JFET, and MOSFET amplifier technologies
標(biāo)簽： LTC 運(yùn)算放大器 模型
上傳時間： 2013-11-14
上傳用戶：zhanditian
分析了調(diào)幅信號和載波信號之間的相位差與調(diào)制信號的極性的對應(yīng)關(guān)系,得出了相敏檢波電路輸出電壓的極性與調(diào)制信號的極性有對應(yīng)關(guān)系的結(jié)論。為了驗證相敏檢波電路的這一特性,給出3 個電路方案,分別選用理想元件和實(shí)際元件,采用Multisim 對其進(jìn)行仿真實(shí)驗,直觀形象地演示了相敏檢波電路的鑒相特性,是傳統(tǒng)的實(shí)際操作實(shí)驗所不可比擬的。關(guān)鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation
上傳時間： 2013-11-23
上傳用戶：guanhuihong
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
標(biāo)簽： Considerations Guidelines and Design
上傳時間： 2013-10-14
上傳用戶：ysystc699
PADS-PowerLogic and PowerPcb實(shí)用教程
標(biāo)簽： PADS-PowerLogic PowerPcb and 實(shí)用教程
上傳時間： 2014-12-24
上傳用戶：youmo81
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