語(yǔ)法分析 C2.1 實(shí)驗(yàn)?zāi)康? 編制一個(gè)遞歸下降分析程序,實(shí)現(xiàn)對(duì)詞法分析程序所提供的單詞序列的語(yǔ)法檢查和結(jié)構(gòu)分析. C2.2 實(shí)驗(yàn)要求 利用C語(yǔ)言編制遞歸下降分析程序,并對(duì)簡(jiǎn)單語(yǔ)言進(jìn)行語(yǔ)法分析. C2.2.1待分析的簡(jiǎn)單語(yǔ)言的語(yǔ)法 用擴(kuò)充的BNF表示如下: (1)<程序>::=Begin<語(yǔ)句串>end (2)<語(yǔ)句串>::=<語(yǔ)句>{ <語(yǔ)句>} (3)<語(yǔ)句>::=<賦值語(yǔ)句> (4)<賦值語(yǔ)句>::=ID:=<表達(dá)式> (5)<表達(dá)式>::=<項(xiàng)>{+<項(xiàng)> | —項(xiàng)>} (6)<項(xiàng)>::=<因子>{*<因子> | /<因子>} (7)<因子>::=ID | NUM | (<表達(dá)式>) C2。2。2實(shí)驗(yàn)要求說(shuō)明 輸入單詞串,以“#”結(jié)束,如果是文法正確的句子,則輸出成功信息,打印“success”,否則輸出“error”.
上傳時(shí)間: 2014-09-05
上傳用戶:caiiicc
實(shí)驗(yàn)?zāi)康? 通過(guò)上機(jī)實(shí)習(xí),加深對(duì)語(yǔ)法制導(dǎo)翻譯原理的理解,掌握將語(yǔ)法分析所識(shí)別的語(yǔ)法成分變換為中間代碼的語(yǔ)義翻譯方法. 實(shí)驗(yàn)要求 采用遞歸下降語(yǔ)法制導(dǎo)翻譯法,對(duì)算術(shù)表達(dá)式、賦值語(yǔ)句進(jìn)行語(yǔ)義分析并生成四元式序列。 實(shí)驗(yàn)的輸入和輸出 輸入是語(yǔ)法分析提供的正確的單詞串,輸出為三地址指令形式的四元式序列。 例如:對(duì)于語(yǔ)句串 Begin a:=2+3*4 x:=(a+b)/c end# 輸出的三地址指令如下: (1) t1=3*4 (2) t2=2+t1 (3) a=t2 (4) t3=a+b (5) t4=t3/c (6) x=t4
標(biāo)簽: 分 翻譯 實(shí)驗(yàn) 制導(dǎo)
上傳時(shí)間: 2017-09-27
上傳用戶:hjshhyy
msp430The LDC1312 and LDC1314 are 2- and 4-channel, 1? Easy-to-use – minimal configuration required 12-bit inductance to digital converters (LDCs) for ? Measure up to 4 sensors with one IC inductive sensing solutions. With multiple channels ? Multiple channels support environmental and and support for remote sensing, the LDC1312 and aging compensation LDC1314 enable the performance and reliability benefits of inductive sensing to be realized at minimal? Multi-channel remote sensing provides lowest cost and power. The products are easy to use, onlysystem cost requiring that the sensor frequency be within 1 kHz ? Pin-compatible medium and high-resolution and 10 MHz to Begin sensing. The wide 1 kHz to 10 options MHz sensor frequency range also enables use of very small PCB coils, further reducing sensing– LDC1312/4: 2/4-ch 12-bit LDC solution cost and size.– LDC1612/4: 2/4-ch 28
上傳時(shí)間: 2016-07-22
上傳用戶:tongmoonsky
PL0語(yǔ)言是與pascal類(lèi)似的語(yǔ)言,但是比pascal語(yǔ)言的詞法、語(yǔ)法更加嚴(yán)格苛刻。 在PL0語(yǔ)言中,只有五種類(lèi)型的單詞:關(guān)鍵字、用戶自定義標(biāo)識(shí)符、數(shù)字、特殊符號(hào)以及非法標(biāo)識(shí)符。 根據(jù)題目給出的PL0的文法,關(guān)鍵字只有如下幾個(gè): Const——用來(lái)聲明常量; Var——用來(lái)聲明變量; Procedure——用來(lái)聲明過(guò)程; Begin——聲明過(guò)程的開(kāi)始; End——聲明過(guò)程的結(jié)束; Ood——單目運(yùn)算符,聲明為關(guān)鍵字; If——條件語(yǔ)句; Then——條件語(yǔ)句; Call——聲明調(diào)用函數(shù); While——循環(huán)語(yǔ)句; Read——讀文件語(yǔ)句; Write——寫(xiě)文件語(yǔ)句; 對(duì)于用戶自定義標(biāo)識(shí)符應(yīng)該滿足:以字母開(kāi)頭,其后是字母和數(shù)字的組合,即:字母(字母|數(shù)字)* 數(shù)字則是數(shù)字字符(0——9)組成的數(shù)字串; 特殊符號(hào)有如下幾個(gè): +,-,*,/,=<>,<,>=,<=,:= 把關(guān)鍵字、算符和界符稱(chēng)為語(yǔ)言固有的單詞,標(biāo)識(shí)符、常量稱(chēng)為用戶自定義的單詞。 為此設(shè)置三個(gè)全程量:SYM,ID,NUM。 SYM:存放每個(gè)單詞的類(lèi)別,為內(nèi)部編碼的表示形式; ID:存放用戶所定義的標(biāo)識(shí)符的值,即標(biāo)識(shí)符字符串的機(jī)內(nèi)表示; NUM:存放用戶定義的數(shù)。
上傳時(shí)間: 2017-06-20
上傳用戶:lbxxx
Radio frequency identifi cation (RFID) technology is a wireless communication technology that enables users to uniquely identify tagged objects or people. RFID is rapidly becoming a cost-effective technology. This is in large part due to the efforts of Wal-Mart and the Department of Defense (DoD) to incorporate RFID technology into their supply chains. In 2003, with the aim of enabling pallet-level tracking of inventory, Wal-Mart issued an RFID mandate requiring its top suppliers to Begin tagging pallets and cases, with Electronic Product Code (EPC) labels. The DoD quickly followed suit and issued the same mandate to its top 100 suppliers. This drive to incorporate RFID technology into their supply chains is motivated by the increased ship- ping, receiving and stocking effi ciency and the decreased costs of labor, storage, and product loss that pallet-level visibility of inventory can offer.
標(biāo)簽: A_Guide_to_Radio_Frequency_IDenti fication RFID
上傳時(shí)間: 2020-06-08
上傳用戶:shancjb
This document provides general hardware and layoutconsiderations and guidelines for hardware engineersimplementing a DDR3 memory subsystem.The rules and recommendations in this document serve as aninitial baseline for board designers to Begin their specificimplementations, such as fly-by memory topology.
標(biāo)簽: ddr3
上傳時(shí)間: 2021-11-21
上傳用戶:
FPGA片內(nèi)FIFO讀寫(xiě)測(cè)試Verilog邏輯源碼Quartus工程文件+文檔說(shuō)明,使用 FPGA 內(nèi)部的 FIFO 以及程序?qū)υ?FIFO 的數(shù)據(jù)讀寫(xiě)操作。FPGA型號(hào)Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。timescale 1ns / 1ps//////////////////////////////////////////////////////////////////////////////////module fifo_test( input clk, //50MHz時(shí)鐘 input rst_n //復(fù)位信號(hào),低電平有效 );//-----------------------------------------------------------localparam W_IDLE = 1;localparam W_FIFO = 2; localparam R_IDLE = 1;localparam R_FIFO = 2; reg[2:0] write_state;reg[2:0] next_write_state;reg[2:0] read_state;reg[2:0] next_read_state;reg[15:0] w_data; //FIFO寫(xiě)數(shù)據(jù)wire wr_en; //FIFO寫(xiě)使能wire rd_en; //FIFO讀使能wire[15:0] r_data; //FIFO讀數(shù)據(jù)wire full; //FIFO滿信號(hào) wire empty; //FIFO空信號(hào) wire[8:0] rd_data_count; wire[8:0] wr_data_count; ///產(chǎn)生FIFO寫(xiě)入的數(shù)據(jù)always@(posedge clk or negedge rst_n)Begin if(rst_n == 1'b0) write_state <= W_IDLE; else write_state <= next_write_state;endalways@(*)Begin case(write_state) W_IDLE: if(empty == 1'b1) //FIFO空, 開(kāi)始寫(xiě)FIFO next_write_state <= W_FIFO; else next_write_state <= W_IDLE; W_FIFO: if(full == 1'b1) //FIFO滿 next_write_state <= W_IDLE; else next_write_state <= W_FIFO; default: next_write_state <= W_IDLE; endcaseendassign wr_en = (next_write_state == W_FIFO) ? 1'b1 : 1'b0; always@(posedge clk or negedge rst_n)Begin if(rst_n == 1'b0) w_data <= 16'd0; else if (wr_en == 1'b1) w_data <= w_data + 1'b1; else w_data <= 16'd0; end///產(chǎn)生FIFO讀的數(shù)據(jù)always@(posedge clk or negedge rst_n)Begin if(rst_n == 1'b0) read_state <= R_IDLE; else read_state <= next_read_state;endalways@(*)Begin case(read_state) R_IDLE: if(full == 1'b1) //FIFO滿, 開(kāi)始讀FIFO next_read_state <= R_FIFO; else next_read_state <= R_IDLE; R_FIFO: if(empty == 1'b1)
標(biāo)簽: fpga fifo verilog quartus
上傳時(shí)間: 2021-12-19
上傳用戶:20125101110
HX711_1Kg#include "HX711.h"float Weight = 0;void setup(){ Init_Hx711(); //初始化HX711模塊連接的IO設(shè)置 Serial.Begin(9600); Serial.print("Welcome to use!\n"); delay(3000); Get_Maopi(); //獲取毛皮}void loop(){ Weight = Get_Weight(); //計(jì)算放在傳感器上的重物重量 Serial.print(float(Weight/1000),3); //串口顯示重量 Serial.print(" kg\n"); //顯示單位 Serial.print("\n"); //顯示單位 delay(1000); //延時(shí)1s}
上傳時(shí)間: 2022-03-20
上傳用戶:
一、建焊盤(pán)打開(kāi)建立焊盤(pán)的軟件Pad Designer路徑:包括采用的制式,現(xiàn)在選公制單位毫米,精度3,右側(cè)問(wèn)是否需要多重鉆孔,這個(gè)功能一般是用于做非圓孔。一般圓孔不用勾選。下面設(shè)定鉆孔樣式,一般是圓孔,鉆孔內(nèi)部是否鍍銅 plated(no plated即為不鍍銅,一般用于塑膠件定位孔),再是鉆孔直徑,設(shè)置精度,是否偏移等。如果是表貼元件,鉆孔直徑設(shè)為0。如果是表面安裝元件,把signle layer mode勾選。焊盤(pán)一般需要 Begin layer和end layer,還有就是soldmask_top,soldmask_bottom,pastemask top,pastemask bottom這幾個(gè)層面。對(duì)表面安裝元件來(lái)說(shuō),只需要Begin layer,soldermask_top以及pastemask_top就可以了。鼠標(biāo)左鍵點(diǎn)擊Begin layer,會(huì)發(fā)現(xiàn)最下面三個(gè)對(duì)話框被刷新,在下面填入需要的值:從左到右:規(guī)則焊盤(pán),熱焊盤(pán),反焊盤(pán)。1規(guī)則焊盤(pán)下面需要填入焊盤(pán)形狀,長(zhǎng)寬,是否有偏移。1熱焊盤(pán),要求選擇焊盤(pán)類(lèi)型,尺寸等;1反焊盤(pán),作用是設(shè)定焊盤(pán)與周邊間距,一般比規(guī)則焊盤(pán)略大6-10mil。鼠標(biāo)點(diǎn)擊soldermask_top,下面對(duì)話框刷新出該選項(xiàng)。按照需要填入數(shù)據(jù)。Pastemask top同樣處理。右邊上角還有視圖角度選擇,Xsection為水平視圖,TOP為從上往下看。
標(biāo)簽: cadence allegro
上傳時(shí)間: 2022-07-02
上傳用戶:XuVshu
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