The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
The PCA9518 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both thedata (SDA) and the clock (SCL) lines, thus enabling virtuallyunlimited buses of 400 pF.
The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areover-voltage tolerant and are high-impedance when the PCA9519 is unpowered.
基于單DSP的VoIP模擬電話適配器研究與實現:提出和實現了一種新穎的基于單個通用數字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限，通常適于運算密集型應用，不適宜控制密集型應用[5]。該系統高效利用單DSP的I/O和片內外存儲器資源，采用μC/OS-II嵌入式實時操作系統，支持SIP和TCP-UDP/IP協議，通過LAN或者寬帶接入，使普通電話機成為Internet終端，實現IP電話。該系統軟硬件結構緊湊高效，運行穩定，成本低，具有廣闊的應用前景。關鍵詞：模擬電話適配器；IP電話；數字信號處理器；μC/OS-II
【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II
Research and Implementation of VoIPATA Based on Single DSP
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
CAN與RS232轉換節點的設計與實現
介紹將CAN總線接口與RS232總線接口相互轉換的設計方法和2種總線電平轉換關系，實現CAN總線與各模塊的接口設計，制定了相應的軟硬件設計方案，并給出軟件設計流程圖以及部分硬件設計原理圖。為CAN總線與RS232總線互聯提供了一種方法，對CAN總線與RS232總線接口設備的互聯和廣泛應用的實現具有重要意義。關鍵詞：CAN總線；RS-232總線；串行通信Design and Realization of CAN and RS232 Transformation NodeZHOU Wei, CHENG Xiao-hong(Information Institute, Wuhan University of Technology, Wuhan 430070)【Abstract】This paper introduces one design method of the CAN bus interface and the RS232 bus interface interconversion, emphasizes two kindof bus level transformation relations, realizes the CAN bus and various modules connection design, formulates the design proposal of correspondingsoftware and hardware, and gives the flow chart of software design as well as the partial schematic diagram of hardware design. It providesonemethod for the CAN bus and the RS232 bus interconnection, has the vital significance to widespread application realization of the CAN busand theRS232 bus interface equipment interconnection.【Key words】CAN bus; RS-232 bus; serial communication
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Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
