Java MP3 Player, Here s a list of features: - Reads, creates, updates, and removes id3v2.3 and id3v2.4 tags - Reads, creates, updates, and removes id3v1 tags - Extracts MPEG data such as bit rate, sample rate, channel mode, etc. - Calculates playing time of mp3 from mpeg information (no good w/VBR) - Can read and create Winamp styled playlists - Offers other utility classes such as MP3FileFilter and MP3Comparator - NullsoftID3GenreTable object keeps a list of genres for you and can automatically determine the id3v1 genre from an id3v2 string or the other way around
標簽： and features creates updates
上傳時間： 2014-11-21
上傳用戶：qq521
Keil C51 上51系列單片機優化的CRC－8 算法。可以自己改其他算式的，包含字節查表，半字節查表，bit計算。很難得的哦。
上傳時間： 2014-01-12
上傳用戶：小鵬
包括使用修正Gram-Schmit算法實現QR分解，自編LU分解、利用冪法和反冪法計算矩陣最大和最小特征值的程序。例外附有使用這些算法的例子供參考。 QR decomposition algorithm based on modified Gram-Schmit LU decomposition algorithm algorithm used to find maximum and minimum eigenvalue based on power and inverse power method and some examples are also included.
標簽： Gram-Schmit 正 分解 算法
上傳時間： 2016-09-07
上傳用戶：cooran
LCD Driver datasheet The SPF54126A, a 262144-color System-on-Chip (SoC) driver LSI designed for small and medium sizes of TFT LCD display, is capable of supporting up to 176xRGBx220 in resolution which can be achieved by the designated RAM for graphic data. The 528-channel source driver has true 6-bit resolution, which generates 64 Gamma-corrected values by an internal D/A converter. The source driver of SPFD54126A adopts OP-AMP structure to enhance display quality and it cooperates with advanced circuitry techniques to reduce power consumption.
標簽： System-on-Chip datasheet designed Driver
上傳時間： 2016-09-22
上傳用戶：xauthu
Name Function --- --- --- --- --- --- Check_SST_39VF160 Check manufacturer and device ID CFI_Query CFI Query Entry/Exit command sequence Erase_Entire_Chip Erase the contents of the entire chip Erase_One_Sector Erase a sector of 2048 word Erase_One_Block Erase a block of 32K word Program_One_Word Alter data in one word Program_One_Sector Alter data in 2048 word sector Program_One_Block Alter data in 32K word block Check_Toggle_Ready End of internal program or erase detection using Toggle bit Check_Data_Polling End of internal program or erase detection using Data# polling
標簽： manufacturer Check_SST Function CFI_Que
上傳時間： 2013-12-21
上傳用戶：徐孺
外國人開發的電磁時域有限差分方法工具包 Electromagnetic Finite-Difference Time-Domain (EmFDTD) is a basic two-dimensional FDTD code developed at the School of Electrical Engineering, Sharif University of Technology. This code has been written based on the standard Yee s FDTD algorithm. Applications include propagation, scattering, and diffraction of electromagnetic waves in homogeneous and non-homogeneous isotropic media for in-plane propagating waves. Negative permittivites or permeabilities as well as dispersion is not included. Zero, Periodic, and Perfectly Matched Layer boundary conditions may be selectively applied to the solution domain. The program is best suited for study of propagation and diffraction of electromagnetic waves in Photonic Crystal structures. EmFDTD is written in MATLAB language and has been tested under MATLAB 5.0 and higher versions.
標簽： Finite-Difference Electromagnetic two-dimensio Time-Domain
上傳時間： 2014-11-24
上傳用戶：watch100
// -*- Mode: Verilog -*- // Filename : wb_master.v // Description : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : Unknown, Use with caution! // Description Specification // General Description: 8, 16, 32-bit WISHBONE Master // Supported cycles: MASTER, READ/WRITE // MASTER, BLOCK READ/WRITE // MASTER, RMW // Data port, size: 8, 16, 32-bit // Data port, granularity 8-bit // Data port, Max. operand size 32-bit // Data transfer ordering: little endian // Data transfer sequencing: undefined
標簽： Description Behavorial wb_master Filename
上傳時間： 2014-07-11
上傳用戶：zhanditian
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
iic總線控制器VHDL實現 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
標簽： VHDL c_control vhd control
上傳時間： 2016-10-30
上傳用戶：woshiayin
WLAN仿真－發送機 wlan No Comments 設置完系統參數后，開始產生發送數據。 1. 產生隨機的發送bit（tx_bits），這里不考慮信道編碼。 2. QAM映射 3. 將數據映射到不同載波，形成OFDM符號 4. 產生pilot，并將pilot插入OFDM符號中 5. 加入dc和guard子載波 6. 進行ifft，將頻域信號變到時域，并加入循環前綴 7. 對信號進行overlap window 8. 在時域產生short preamble 9. 在時域產生long preamble 10. 將preamble和數據符號組成packet 11. 升采樣 得到信道傳輸的數據Tx_signal_up 具體程序見附件 wlan_transmitter.m
上傳時間： 2016-11-09
上傳用戶：exxxds
