Portable, battery-powered operation of electronic apparatushas become increasingly desirable. Medical, remotedata acquisition, power monitoring and other applicationsare good candidates for battery operation. In some circumstances,due to space, power or reliability CONSIDERATIONS,it is preferable to operate the circuitry from a single 1.5Vcell. Unfortunately, a 1.5V supply eliminates almost alllinear ICs as design candidates. In fact, the LM10 opamp-reference and the LT®1017/LT1018 comparators arethe only IC gain blocks fully specifi ed for 1.5V operation.Further complications are presented by the 600mV dropof silicon transistors and diodes. This limitation consumesa substantial portion of available supply range, makingcircuit design diffi cult. Additionally, any circuit designedfor 1.5V operation must function at end-of-life batteryvoltage, typically 1.3V. (See Box Section, “Componentsfor 1.5V Operation.”)
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designCONSIDERATIONS and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
This document provides practical, common guidelines for incorporating PCI Express interconnect
layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10-
layer or more server baseboard designs. Guidelines and constraints in this document are intended
for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI
Express devices located on the same baseboard (chip-to-chip routing) and interconnects between
a PCI Express device located “down” on the baseboard and a device located “up” on an add-in
card attached through a connector.
This document is intended to cover all major components of the physical interconnect including
design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card
edge-finger and connector CONSIDERATIONS. The intent of the guidelines and examples is to help
ensure that good high-speed signal design practices are used and that the timing/jitter and
loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect.
However, while general physical guidelines and suggestions are given, they may not necessarily
guarantee adequate performance of the interconnect for all layouts and implementations.
Therefore, designers should consider modeling and simulation of the interconnect in order to
ensure compliance to all applicable specifications.
The document is composed of two main sections. The first section provides an overview of
general topology and interconnect guidelines. The second section concentrates on physical layout
constraints where bulleted items at the beginning of a topic highlight important constraints, while
the narrative that follows offers additional insight.
Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply CONSIDERATIONS that an engineer must think through whendesigning a power supply for an FPGA.
Abstract: This article discusses the requirements and design CONSIDERATIONS for automotive applications, including those for enginecontrol, infotainment, and body electronics. It also discusses several Maxim devices that are ideal for automotive applications.
Portable, battery-powered operation of electronic apparatushas become increasingly desirable. Medical, remotedata acquisition, power monitoring and other applicationsare good candidates for batteryoperation. In some circumstances,due to space, power or reliability CONSIDERATIONS,it is preferable to operate the circuitry from a single 1.5Vcell. Unfortunately, a 1.5V supply eliminates almost alllinear ICs as design candidates. In fact, the LM10 opamp-reference and the LT®1017/LT1018 comparators arethe only IC gain blocks fully specifi ed for 1.5V operation.Further complications are presented by the 600mV dropof silicon transistors and diodes. This limitation consumesa substantial portion of available supply range, makingcircuit design diffi cult. Additionally, any circuit designedfor 1.5V operation mustfunction at end-of-life batteryvoltage, typically 1.3V. (See Box Section, “Componentsfor 1.5V Operation.”)
Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply CONSIDERATIONS that an engineer must think through whendesigning a power supply for an FPGA.
The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat of the FPGA package. As the interfaces get fasterand wider, choosing the right package has becomeone of the key CONSIDERATIONS for the systemdesigner.
This application note covers the design CONSIDERATIONS of a system using the performance
features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The
design focuses on high system throughput through the AXI Interconnect core with F
MAX
and
area optimizations in certain portions of the design.
The design uses five AXI video direct memory access (VDMA) engines to simultaneously move
10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p
format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video
test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary
video timing signals. Data read by each AXI VDMA is sent to a common on-screen display
(OSD) core capable of multiplexing or overlaying multiple video streams to a single output video
stream. The output of the OSD core drives the DVI video display interface on the board.
Performance monitor blocks are added to capture performance data. All 10 video streams
moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are
controlled by a MicroBlaze™ processor.
The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the
Xilinx® ML605 Rev D evaluation board
多遠程二極管溫度傳感器-Design CONSIDERATIONS for pc thermal management
Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.
