本實(shí)驗(yàn)要求設(shè)計(jì)一個(gè)簡易的頻率計(jì)，實(shí)現(xiàn)對標(biāo)準(zhǔn)的方波信號(hào)進(jìn)行頻率測量，并把測量的結(jié)果送到8 位的數(shù)碼管顯示，所要求測量范圍是1Hz~99999999Hz。整個(gè)設(shè)計(jì)的基本原理就是對1 秒鐘之內(nèi)輸入的方波進(jìn)行計(jì)數(shù)，把所得數(shù)據(jù)保存在計(jì)數(shù)器里，經(jīng)過譯碼器處理之后，然后送往數(shù)碼管顯示。這里采用的方案是在采樣時(shí)鐘的上升沿開始計(jì)數(shù)，然后在下一個(gè)上升沿把計(jì)數(shù)器里的數(shù)據(jù)送往數(shù)碼管，并且把計(jì)數(shù)器清零，讓其重新計(jì)數(shù)。整個(gè)方案的實(shí)現(xiàn)主要分為四個(gè)模塊：時(shí)鐘分頻(clk_div)模塊、計(jì)數(shù)器模塊(counter)、譯碼器模塊(seg8)、掃描輸出(saomiao)模塊
標(biāo)簽： 頻率計(jì)設(shè)
上傳時(shí)間： 2013-11-20
上傳用戶：avensy
#include <at24c01a.h>/*************************************************向24C01A寫入一個(gè)字節(jié)輸入：E2ROM地址，字節(jié)數(shù)據(jù)******************************************************/void write24c01a(uchar uadd_1,uchar udata_1){sendbyte=0xa0;start();send(sendbyte);if (!ack())continue;send(uadd_1);if (!ack())continue;send(udata_1)if (!ack())continue;stop();}/**********************************發(fā)送開始*****************************************/void start(void){a_scl=1;a_sda=1;a_sda=0;a_scl=0;a_scl=1;}/********************************************發(fā)送停止*******************************************/void stop(void){a_scl=0;a_sda=0;a_scl=1;a_sda=1;} /*********************************************發(fā)送反饋************************************************/bit ack(void){int a_acka_scl=0;a_scl=0;a_scl=0;a_scl=1;a_ack=a_sda;a_scl=0;return(a_ack)}/**************************************發(fā)送無反饋********************************************/bit noack(void){int a_ack;a_scl=1;a_scl=1;a_scl=0;}/*******************************************發(fā)送****************************************************/void send(uchar undata){uchar i;sendbyte=undatafor(i=8;i>0;i--){a_sda=sendbyte7;a_scl=0;a_scl=1;sendbyte=sendbyte<<1}}/********************************************接受****************************************************/ void receive(void){int i;uchar data;for(i=8;i>0;i--){ a_scl=1;receivebyte7=a_sda;a_scl=0;receivebyte=receivebyte>>1}receivedata=receivebyte;}/********************************************向 24c01a讀一個(gè)字節(jié)；輸入：EEROM地址；輸出：EEROM數(shù)據(jù)；********************************************/void read24c01a(uchar counter){receivebyte=0xa1;start();send(receivebyte);if (!ack())continue;send(counter);if (!ack())continue;receive()noack();stop();}
上傳時(shí)間： 2013-12-23
上傳用戶：wxhwjf
單片機(jī)系統(tǒng)“PC”失控的軟件措施Software Measure of GettingO uto fC ontrolfo r“PC"in S ingleC hipC omputerS ystem謐 加 春 王 曉 基 雷 小 華(江 西 理 工 大 學(xué)機(jī) 電 工 程 學(xué) 院 ，贛 州 34 10 00)摘要單片機(jī)系統(tǒng)在實(shí)際工業(yè)現(xiàn)場中可能遇到各種干擾和自身的隨機(jī)性故障?，F(xiàn)場惡劣的環(huán)境有可能使計(jì)算機(jī)系統(tǒng)發(fā)生異常，計(jì)算機(jī)程序指針“PC”失控就是常見的故障之一，如果發(fā)生“PC”失控，將導(dǎo)致CPI工作混亂，釀成嚴(yán)重的事故。研究了“PC”失控的原因，并指出軟件抗干擾的幾種方法，有效保證單片機(jī)系統(tǒng)的正常工作。關(guān)鍵詞單片機(jī)“PC”失控抗干擾Abstract Inp racticalin dustrialfi elds,th ereis v ariousin terferencea fectingo perationo fsi nglec hipc omputersy stemsa ndt hec omputersy stems。fac噸random faults飾themselves. It is very common that the severe environment makes the computer systems abnormal. The program counter "PC"gettingo utof co ntorlis on eo fth ec ommonfa ults.If th isoc curs,C PUw ouldb eru nningo utof or deran din torducesse riousan cient.T hec ausesof " PC"geting out of control， studied in this paper and some countermeasures of anti-interference師software are given to ensure single chip computer systemworking properly.Keywords Single。飾computer Porgramc ounter"P C" Anti-interfeernc 在設(shè) 計(jì) 和 開發(fā)單片機(jī)系統(tǒng)時(shí)，一般難以周全地預(yù)計(jì)單片機(jī)系統(tǒng)在實(shí)際工業(yè)現(xiàn)場中可能遇到的各種干擾和自身的隨機(jī)性故障。因此，除了采取防止和抑制干擾的各項(xiàng)措施外，還應(yīng)該借助于軟件措施克服某些干擾，系統(tǒng)還應(yīng)具備迅速自行恢復(fù)的能力。本文介紹的應(yīng)對單片機(jī)系統(tǒng)PC失控的軟件措施，設(shè)計(jì)靈活，節(jié)省硬件資源，能保證測控系統(tǒng)長期可靠地運(yùn)行。MC S- 5 1單片機(jī)以其優(yōu)良的性能價(jià)格比大量應(yīng)用于工業(yè)現(xiàn)場測試和控制領(lǐng)域。但是，現(xiàn)場惡劣的環(huán)境有可能使計(jì)算機(jī)系統(tǒng)發(fā)生異常，計(jì)算機(jī)程序指針PC失控就是常見的故障之一，一旦發(fā)生PC“走飛”，計(jì)算機(jī)系統(tǒng)就會(huì)出現(xiàn)工作混亂，釀成嚴(yán)重的事故。為 了 在 CP 失控時(shí)盡量減少由此帶來的不利影響，并盡快使系統(tǒng)恢復(fù)正常，需要采取一定的軟件措施和硬件措施。常見的硬件措施有“看門狗”電路。軟件措施設(shè)置的前提條件是:①在干擾作用下，微機(jī)系統(tǒng)硬件部分不會(huì)受到任何損壞，或者損壞部分設(shè)置有監(jiān)測狀態(tài)可供查詢;②程序區(qū)不會(huì)受到干擾侵害。單片機(jī)系統(tǒng)的程序和表格以及重要的參數(shù)均設(shè)置在ROM區(qū)，不會(huì)因干擾的侵人而改變;③ RAM區(qū)中的重要數(shù)據(jù)不會(huì)被破壞，或者雖然被破壞，但是可以重新建立。
標(biāo)簽： 單片機(jī)系統(tǒng) 軟件
上傳時(shí)間： 2013-11-02
上傳用戶：bhqrd30
針對UHF讀寫器設(shè)計(jì)中，在符合EPC Gen2標(biāo)準(zhǔn)的情況下，對標(biāo)簽返回的高速數(shù)據(jù)進(jìn)行正確解碼以達(dá)到正確讀取標(biāo)簽的要求，提出了一種新的在ARM平臺(tái)下采用邊沿捕獲統(tǒng)計(jì)定時(shí)器數(shù)判斷數(shù)據(jù)的方法，并對FM0編碼進(jìn)行解碼。與傳統(tǒng)的使用定時(shí)器定時(shí)采樣高低電平的FM0解碼方法相比，該解碼方法可以減少定時(shí)器定時(shí)誤差累積的影響；可以將捕獲定時(shí)器數(shù)中斷與數(shù)據(jù)判斷解碼相對分隔開，使得中斷對解碼影響很小，實(shí)現(xiàn)捕獲與解碼的同步。通過實(shí)驗(yàn)表明，這種方法提高了解碼的效率，在160 Kb/s的接收速度下，讀取一張標(biāo)簽的時(shí)間約為30次/s。 Abstract: Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator， the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level， the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding， so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding， at 160 Kb/s receiving speed， the time of the interrogator to read a tag is about 30 times/s.
標(biāo)簽： UHF FM0 讀寫器 解碼技術(shù)
上傳時(shí)間： 2013-11-10
上傳用戶：liufei
library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity counter is Port ( clk : in std_logic; resetn : in std_logic; dout : out std_logic_vector(7 downto 0); lcd_en : out std_logic; lcd_rs : out std_logic; lcd_rw : out std_logic); end counter;
標(biāo)簽： lcd 計(jì)數(shù)顯示 程序
上傳時(shí)間： 2013-10-30
上傳用戶：wqxstar
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上傳時(shí)間： 2013-11-11
上傳用戶：gundamwzc
This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter.
標(biāo)簽： register straightforward universal storage
上傳時(shí)間： 2013-12-28
上傳用戶：努力努力再努力
這是我自己編寫的三分頻，也就是奇數(shù)分頻，占空比為1：1，當(dāng)然如果需要其它奇數(shù)分頻，只要將程序里面的N和counter修改即可
上傳時(shí)間： 2015-08-06
上傳用戶：我們的船長
Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
標(biāo)簽： Spartan drives This perphrials
上傳時(shí)間： 2014-05-29
上傳用戶：SimonQQ
This example provides a description of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data buffer stored as constant in the Flash memory to another buffer in the RAM memory. The received data are stored in the DST_Buffer. The DMA channel transfer complete interrupt is enabled to generate an interrupt at the end of the buffer transfer. As soon as the transfer is completed an interrupt is generated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has been transfered. TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
標(biāo)簽： description provides transfer example
上傳時(shí)間： 2016-04-24
上傳用戶：ecooo
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