·詳細說明：支持SD卡的MP3電路圖,powerpcb4.0格式.使用AVR單片機- Supports SD the Card the MP3 circuit diagram, the powerpcb4.0 form Uses the AVR monolithic integrated circuit
上傳時間： 2013-06-05
上傳用戶：zhaoq123
·ARM+MP3+USB HOST 開發板(at91sam7s64+vs1003b+ch375v) 1.atmel出品的at91sam7s64作為主控芯片 2.外配vs1003b作為mp3/wma解碼器 3.ch375v作usb主機芯片， 4.支持接口 5.sd Card,mmc Card 6.cf Card 7.u盤 8.ide port(連接硬盤，光驅) 9.液晶 10.可通過串口，usb下載程
上傳時間： 2013-05-29
上傳用戶：Yukiseop
ST Cortex-M3高性能評估套件，USB，Ethernet，CAN，MicroSD Card……
上傳時間： 2013-06-20
上傳用戶：qwe1234
Abstract: Most magnetic read head data sheets do not fully specify the frequency-dependent components andare often vague when specifying other key parameters. In some cases, the specifications of two very similarheads from two different manufacturers might be quite different in terms of parameters specified and omitted.The limitations in the data sheets make designing an optimum Card reading system unnecessarily difficult andtime consuming. This document outlines a strategy to overcome the above shortcomings and offers guidelinesto overcome the noise issues.
上傳時間： 2013-11-13
上傳用戶：dysyase
A complete design for a data acquisition Card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上傳時間： 2013-10-29
上傳用戶：BOBOniu
PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
標簽： Architecture ExpressTM PCI
上傳時間： 2013-11-03
上傳用戶：gy592333
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in Card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in Card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in Card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2013-10-15
上傳用戶：busterman
Most portable computers have built-in sockets to acceptsmall PC Cards for use as extended memories, fax modems,network interfaces, wireless communicators and awide assortment of other functions. The Personal ComputerMemory Card International Association (PCMCIA)has released specifications that outline the general powerrequirements for these Cards.
上傳時間： 2013-11-18
上傳用戶：bcjtao
Abstract: This application note describes how to build, debug, and run applications on the on-board MAXQ622microcontroller to interface with the DS8005 dual smart Card interface. This is demonstrated in both IAREmbedded Workbench and the Rowley CrossWorks IDE, using sample code provided with the kit.
上傳時間： 2013-10-29
上傳用戶：ddddddd
SD 卡（Secure Digital Memory Card）是一種為滿足安全性、容量、性能和使用環境等各方面的需求而設計的一種新型存儲器件，SD 卡允許在兩種模式下工作，即SD 模式和SPI 模式，本系統采用SPI 模式。本小節僅簡要介紹在SPI 模式下，STM32 處理器如何讀寫SD 卡，如果讀者如希望詳細了解SD 卡，可以參考相關資料。
標簽： SD卡
上傳時間： 2013-11-12
上傳用戶：huannan88
