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  • 基于PIC單片機(jī)的低功耗讀卡器硬件設(shè)計(jì)

    基于PIC單片機(jī)的低功耗讀卡器硬件設(shè)計(jì):本文提出了一個(gè)完整的基于串口的智能讀卡器子系統(tǒng)設(shè)計(jì)方案并將其實(shí)現(xiàn)。讀卡器的設(shè)計(jì)突出了小型化的要求,全部器件使用貼片封裝。為了減小讀卡器的體積,設(shè)計(jì)中還使用了串口竊電的技術(shù),使用串口信號(hào)線直接給讀卡器供電。為此,讀卡器使用了省電的設(shè)計(jì),采用了省電的集成電路,并大膽簡(jiǎn)化了許多傳統(tǒng)的設(shè)計(jì)電路。關(guān)鍵字: 讀卡器, 單片機(jī), 串口竊電 Abstract: This paper aims to put forward a complete design of Smart IC Card reader based onSerial Port and propose the way of realizing it for the purpose of Network Security. SMD isadopted to make Smart IC reader smaller in this design. To reduce the volume of Smart ICreader, Serial Port powered technology is employed to get power from the signal line of Serial Port. For this reason, low-power consumption components are adopted in the design and some traditional designs are simplified to reduce the power consumption.Keywords: Card Reader; Single-chip Computer; Serial Port Powered IC 卡系統(tǒng)保存了加密算法所需要的工作密鑰,供加密算法對(duì)網(wǎng)絡(luò)上傳輸?shù)臄?shù)據(jù)加密使用,是整個(gè)系統(tǒng)網(wǎng)絡(luò)安全的核心。在IC 卡子系統(tǒng)中,讀卡器是一個(gè)重要的部分。它起著管理IC卡、在IC 卡和PC或網(wǎng)絡(luò)計(jì)算機(jī)間傳遞數(shù)據(jù)的重要作用。本文以一片PIC單片機(jī)為核心完成了基于RS232 串口的讀卡器的硬件設(shè)計(jì)。

    標(biāo)簽: PIC 單片機(jī) 低功耗 讀卡器

    上傳時(shí)間: 2014-04-14

    上傳用戶:wanghui2438

  • 微型計(jì)算機(jī)總線知識(shí)

    計(jì)算機(jī)部件要具有通用性,適應(yīng)不同系統(tǒng)與不同用戶的需求,設(shè)計(jì)必須模塊化。計(jì)算機(jī)部件產(chǎn)品(模塊)供應(yīng)出現(xiàn)多元化。模塊之間的聯(lián)接關(guān)系要標(biāo)準(zhǔn)化,使模塊具有通用性。模塊設(shè)計(jì)必須基于一種大多數(shù)廠商認(rèn)可的模塊聯(lián)接關(guān)系,即一種總線標(biāo)準(zhǔn)。總線的標(biāo)準(zhǔn)總線是一類信號(hào)線的集合是模塊間傳輸信息的公共通道,通過它,計(jì)算機(jī)各部件間可進(jìn)行各種數(shù)據(jù)和命令的傳送。為使不同供應(yīng)商的產(chǎn)品間能夠互換,給用戶更多的選擇,總線的技術(shù)規(guī)范要標(biāo)準(zhǔn)化。總線的標(biāo)準(zhǔn)制定要經(jīng)周密考慮,要有嚴(yán)格的規(guī)定。總線標(biāo)準(zhǔn)(技術(shù)規(guī)范)包括以下幾部分:機(jī)械結(jié)構(gòu)規(guī)范:模塊尺寸、總線插頭、總線接插件以及按裝尺寸均有統(tǒng)一規(guī)定。功能規(guī)范:總線每條信號(hào)線(引腳的名稱)、功能以及工作過程要有統(tǒng)一規(guī)定。電氣規(guī)范:總線每條信號(hào)線的有效電平、動(dòng)態(tài)轉(zhuǎn)換時(shí)間、負(fù)載能力等。總線的發(fā)展情況S-100總線:產(chǎn)生于1975年,第一個(gè)標(biāo)準(zhǔn)化總線,為微計(jì)算機(jī)技術(shù)發(fā)展起到了推動(dòng)作用。IBM-PC個(gè)人計(jì)算機(jī)采用總線結(jié)構(gòu)(Industry Standard Architecture, ISA)并成為工業(yè)化的標(biāo)準(zhǔn)。先后出現(xiàn)8位ISA總線、16位ISA總線以及后來兼容廠商推出的EISA(Extended ISA)32位ISA總線。為了適應(yīng)微處理器性能的提高及I/O模塊更高吞吐率的要求,出現(xiàn)了VL-Bus(VESA Local Bus)和PCI(Peripheral Component Interconnect,PCI)總線。適合小型化要求的PCMCIA(Personal Computer Memory Card International Association)總線,用于筆記本計(jì)算機(jī)的功能擴(kuò)展。總線的指標(biāo)計(jì)算機(jī)主機(jī)性能迅速提高,各功能模塊性能也要相應(yīng)提高,這對(duì)總線性能提出更高的要求。總線主要技術(shù)指標(biāo)有幾方面:總線寬度:一次操作可以傳輸?shù)臄?shù)據(jù)位數(shù),如S100為8位,ISA為16位,EISA為32位,PCI-2可達(dá)64位。總線寬度不會(huì)超過微處理器外部數(shù)據(jù)總線的寬度。總數(shù)工作頻率:總線信號(hào)中有一個(gè)CLK時(shí)鐘,CLK越高每秒鐘傳輸?shù)臄?shù)據(jù)量越大。ISA、EISA為8MHz,PCI為33.3MHz, PCI-2可達(dá)達(dá)66.6MHz。單個(gè)數(shù)據(jù)傳輸周期:不同的傳輸方式,每個(gè)數(shù)據(jù)傳輸所用CLK周期數(shù)不同。ISA要2個(gè),PCI用1個(gè)CLK周期。這決定總線最高數(shù)據(jù)傳輸率。5. 總線的分類與層次系統(tǒng)總線:是微處理器芯片對(duì)外引線信號(hào)的延伸或映射,是微處理器與片外存儲(chǔ)器及I/0接口傳輸信息的通路。系統(tǒng)總線信號(hào)按功能可分為三類:地址總線(Where):指出數(shù)據(jù)的來源與去向。地址總線的位數(shù)決定了存儲(chǔ)空間的大小。系統(tǒng)總線:數(shù)據(jù)總線(What)提供模塊間傳輸數(shù)據(jù)的路徑,數(shù)據(jù)總線的位數(shù)決定微處理器結(jié)構(gòu)的復(fù)雜度及總體性能。控制總線(When):提供系統(tǒng)操作所必需的控制信號(hào),對(duì)操作過程進(jìn)行控制與定時(shí)。擴(kuò)充總線:亦稱設(shè)備總線,用于系統(tǒng)I/O擴(kuò)充。與系統(tǒng)總線工作頻率不同,經(jīng)接口電路對(duì)系統(tǒng)總統(tǒng)信號(hào)緩沖、變換、隔離,進(jìn)行不同層次的操作(ISA、EISA、MCA)局部總線:擴(kuò)充總線不能滿足高性能設(shè)備(圖形、視頻、網(wǎng)絡(luò))接口的要求,在系統(tǒng)總線與擴(kuò)充總線之間插入一層總線。由于它經(jīng)橋接器與系統(tǒng)總線直接相連,因此稱之為局部總線(PCI)。

    標(biāo)簽: 微型計(jì)算機(jī) 總線

    上傳時(shí)間: 2013-11-09

    上傳用戶:nshark

  • 基于ADSP-BF561 的數(shù)字?jǐn)z像系統(tǒng)設(shè)計(jì)

    基于ADSP-BF561的數(shù)字?jǐn)z像系統(tǒng)設(shè)計(jì)Design of Digital Video Camera System Based on Digital Signal ProcessorADSP-BF561(浙江大學(xué) 信息與通信工程研究所,浙江 杭州 310027) 馬海杰, 劉云海摘要:介紹了基于ADI雙核的數(shù)字信號(hào)處理芯片ADSP-BF561 的數(shù)字?jǐn)z像系統(tǒng)實(shí)現(xiàn)方案。系統(tǒng)包括硬件和軟件兩部分,硬件主要有ADSP-BF561及其外圍電路、音視頻模數(shù)/數(shù)模轉(zhuǎn)換、CF卡/微硬盤接口等部分。軟件主要有操作系統(tǒng)及音視頻編解碼算法等部分。關(guān)鍵詞:ADSP-BF561 ;數(shù)字?jǐn)z像機(jī);微硬盤;MPEG-4;A/D;D/A中圖分類號(hào):TN948.41文獻(xiàn)標(biāo)識(shí)碼:AAbstract: An implementation of digital video camera system based on ADI dual core digital signal processor ADSP-BF561 is introduced. The system can be divided into two parts——hardware and software design. The hardware design includes ADSP-BF561 and perpheral apparatus, A/D,D/A, CF Card or Microdrive and so on. The software includes operating system , audio and video coding algorithm.Key words: ADSP-BF561; digital video camera; microdrive; MPEG-4;A/D;D/A

    標(biāo)簽: ADSP-BF 561 數(shù)字?jǐn)z像 系統(tǒng)設(shè)計(jì)

    上傳時(shí)間: 2013-11-10

    上傳用戶:yl1140vista

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial Card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, Card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    標(biāo)簽: Adapter Serial 2303 USB

    上傳時(shí)間: 2013-11-01

    上傳用戶:ghostparker

  • 存儲(chǔ)卡格式PMC的轉(zhuǎn)換

    通過存儲(chǔ)卡備份的 PMC 稱之為存儲(chǔ)卡格式的PMC。由于其為機(jī)器語言格式,不能由計(jì)算機(jī)直接識(shí)別和讀取并進(jìn)行修改和編輯,所以必須進(jìn)行格式轉(zhuǎn)換。同理,當(dāng)在計(jì)算機(jī)上編輯好的PMC 程序也不能直接存儲(chǔ)到M-Card 上,然后裝載到CNC 中,也必須通過格式轉(zhuǎn)換。

    標(biāo)簽: PMC 存儲(chǔ)卡 轉(zhuǎn)換

    上傳時(shí)間: 2013-11-17

    上傳用戶:13160677563

  • 智能卡技術(shù)_王愛英

    智能卡是一種集成電路卡(IC Card),以電子貨幣形式流通于市場(chǎng),也可用作身份證明或健康卡。它繼承了磁卡以及其他IC卡的所有優(yōu)點(diǎn),并有極高的安全、保密、防偽能力。本書對(duì)三種IC卡(存儲(chǔ)器卡、邏輯加密卡和智能卡)和磁卡的物理結(jié)構(gòu)、邏輯特性、實(shí)現(xiàn)技術(shù)和應(yīng)用系統(tǒng)等進(jìn)行了較為全面的論述,較詳細(xì)地闡明了有關(guān)的國(guó)際標(biāo)準(zhǔn)、安全保密體制和讀寫設(shè)備(讀卡器)等,并以自動(dòng)柜員機(jī)ATM和銷售點(diǎn)終端POS為重點(diǎn)介紹了卡的應(yīng)用技術(shù)和應(yīng)用系統(tǒng)。

    標(biāo)簽: 智能卡技術(shù)

    上傳時(shí)間: 2013-11-19

    上傳用戶:蟲蟲蟲蟲蟲蟲

  • sd-Card封裝庫

    里面包含了常見SDCard 封裝庫文件,有需要自己下,沒有積分的請(qǐng)留下郵箱

    標(biāo)簽: sd-Card 封裝庫

    上傳時(shí)間: 2013-10-14

    上傳用戶:stst

  • TF-Card封裝庫文件

    常見TFCard封裝庫,用DXP2004能夠直接使用。

    標(biāo)簽: TF-Card 封裝 庫文件

    上傳時(shí)間: 2013-11-23

    上傳用戶:marten

  • sim-Card封裝

    現(xiàn)在很多遠(yuǎn)程控制系統(tǒng)中應(yīng)用了SIM卡,現(xiàn)在把其封裝成庫,需要的自己下。沒有積分的可以留下郵箱

    標(biāo)簽: sim-Card 封裝

    上傳時(shí)間: 2013-11-12

    上傳用戶:hanhanhan

  • pci e PCB設(shè)計(jì)規(guī)范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in Card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in Card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in Card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標(biāo)簽: pci PCB 設(shè)計(jì)規(guī)范

    上傳時(shí)間: 2014-01-24

    上傳用戶:s363994250

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