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Chip

“Chip”技術(shù)作為生命科學(xué)的最新技術(shù)近些年來發(fā)展迅速，被廣泛的應(yīng)用于各個(gè)生命科學(xué)領(lǐng)域，包括疾病預(yù)測與診斷、基因突變檢測、遺傳學(xué)產(chǎn)前診斷等臨床應(yīng)用中。芯片技術(shù)包括最常見的DNA芯片（基因芯片）、蛋白芯片、microRNA芯片及最新開放的新型芯片等。

HDL Chip Design

·HDL Chip Design

標(biāo)簽： nbsp Design Chip HDL

上傳時(shí)間： 2013-06-18

上傳用戶：lizhen9880
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physi

·Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physical Compiler and Primetime

標(biāo)簽： nbsp Synthesis Advanced Synopsys

上傳時(shí)間： 2013-04-24

上傳用戶：alia
On-Chip ESD Protection for Integrated Circuits (英).pdf

資料->【E】光盤論文->【E5】英文書籍->On-Chip ESD Protection for Integrated Circuits (英).pdf

標(biāo)簽： Integrated Protection Circuits On-Chip

上傳時(shí)間： 2013-04-24

上傳用戶：xwd2010
FPGA-based link layer Chip S19202 configuration

FPGA-based link layer Chip S19202 configuration

標(biāo)簽： configuration FPGA-based S19202 layer

上傳時(shí)間： 2013-08-18

上傳用戶：xsnjzljj
demonstrate how to use the bulk endpoint pairing feature of the EZ-USB Chip

demonstrate how to use the bulk endpoint pairing feature of the EZ-USB Chip

標(biāo)簽： demonstrate the endpoint feature

上傳時(shí)間： 2014-01-18

上傳用戶：youmo81
AD9850 DDS Chip driver

AD9850 DDS Chip driver

標(biāo)簽： driver 9850 Chip DDS

上傳時(shí)間： 2015-03-15

上傳用戶：妄想演繹師
This directory contains the 8051 firmware Vend_Ax source code for the Anchor Chips EZ-USB Chip.

This directory contains the 8051 firmware Vend_Ax source code for the Anchor Chips EZ-USB Chip.

標(biāo)簽： directory the contains firmware

上傳時(shí)間： 2014-01-07

上傳用戶：xjz632
The CC1000 RF transceiver is very easy to interface with a microcontroller. The Chip is configured

The CC1000 RF transceiver is very easy to interface with a microcontroller. The Chip is configured using a three-wire bus, comprising of PCLK, PDATA and PALE signals.

標(biāo)簽： microcontroller transceiver configured The

上傳時(shí)間： 2014-01-04

上傳用戶：c12228
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-Chip (SOC) de

The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-Chip (SOC) development. The IP cores are centered around the common on-Chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.

標(biāo)簽： system-on-Chip integrated designed reusable

上傳時(shí)間： 2013-12-20

上傳用戶：小眼睛LSL
CH372 USB-UART Chip Specification Document,for reference only

CH372 USB-UART Chip Specification Document,for reference only

標(biāo)簽： Specification reference USB-UART Document

上傳時(shí)間： 2015-04-19

上傳用戶：llandlu

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Chip

HDL Chip Design

Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physi

On-Chip ESD Protection for Integrated Circuits (英).pdf

FPGA-based link layer Chip S19202 configuration

demonstrate how to use the bulk endpoint pairing feature of the EZ-USB Chip

AD9850 DDS Chip driver

This directory contains the 8051 firmware Vend_Ax source code for the Anchor Chips EZ-USB Chip.

The CC1000 RF transceiver is very easy to interface with a microcontroller. The Chip is configured

The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-Chip (SOC) de

CH372 USB-UART Chip Specification Document,for reference only