基于ADSP-BF561的數字攝像系統設計Design of Digital Video Camera System Based on Digital Signal ProcessorADSP-BF561（浙江大學 信息與通信工程研究所，浙江 杭州 310027） 馬海杰, 劉云海摘要：介紹了基于ADI雙核的數字信號處理芯片ADSP-BF561 的數字攝像系統實現方案。系統包括硬件和軟件兩部分，硬件主要有ADSP-BF561及其外圍電路、音視頻模數/數模轉換、CF卡/微硬盤接口等部分。軟件主要有操作系統及音視頻編解碼算法等部分。關鍵詞：ADSP-BF561 ;數字攝像機;微硬盤;MPEG-4;A/D;D/A中圖分類號:TN948.41文獻標識碼:AAbstract: An implementation of digital video camera system based on ADI dual core digital signal processor ADSP-BF561 is introduced. The system can be divided into two parts——hardware and software design. The hardware design includes ADSP-BF561 and perpheral apparatus, A/D,D/A, CF card or Microdrive and so on. The software includes operating system , audio and video coding algorithm.Key words: ADSP-BF561; digital video camera; microdrive; MPEG-4;A/D;D/A
上傳時間： 2013-11-10
上傳用戶：yl1140vista
叫你如何擁有良好的編碼風格
上傳時間： 2013-11-06
上傳用戶：yt1993410
MPEG（Moving Picture Experts Group）和VCEG（Video Coding Experts Group）已經聯合開發了一個比早期研發的MPEG 和H.263 性能更好的視頻壓縮編碼標準，這就是被命名為AVC（Advanced Video Coding），也被稱為ITU-T H.264 建議和MPEG-4 的第10 部分的標準，簡稱為H.264/AVC 或H.264。這個國際標準已經與2003 年3 月正式被ITU-T 所通過并在國際上正式頒布。為適應高清視頻壓縮的需求，2004 年又增加了FRExt 部分；為適應不同碼率及質量的需求，2006 年又增加了可伸縮編碼 SVC。
上傳時間： 2013-11-19
上傳用戶：dancnc
摘 要： 針對非同分布的Nakagami信道，基于矩生成函數MGF(Moment Generation Function)的分析方法，提出正交空時分組碼系統STBC(Space-Time Block Coding)的一種快速性能評估算法，不需要涉及超幾何函數積分運算，可在中高信噪比時，快速準確地估計STBC系統的符號錯誤概率性能。在平坦瑞利衰落信道下的計算機仿真表明，該算法與已有的STBC系統的近似估計算法相比，具有較優的性能。 關鍵詞： 正交空時分組碼； MIMO； MGF； 誤符號率
上傳時間： 2014-12-29
上傳用戶：如果你也聽說
Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.
上傳時間： 2013-10-18
上傳用戶：myworkpost
叫你如何擁有良好的編碼風格
上傳時間： 2014-01-04
上傳用戶：s藍莓汁
One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
上傳時間： 2013-11-01
上傳用戶：xzt
這篇文章討論了不同HDL代碼的編寫方式，對綜合結果的影響。閱讀本文對深入了解綜合工具和提高HDL的編寫水平有不少幫助，原文時針對Synopsys的綜合軟件論述的，但對所有綜合軟件，都有普遍的借鑒意義
標簽： Synthesis Coding Styles Guide
上傳時間： 2014-01-11
上傳用戶：亞亞娟娟123
This hands-on, one-stop guide delivers the focused, streamlined direction you need to get your Web solutions up and running quickly. Zero in on key ASP.NET configuration details and techniques using quick-reference tables, lists, coding and more.
標簽： streamlined direction hands-on delivers
上傳時間： 2015-01-11
上傳用戶：Thuan
In each step the LZSS algorithm sends either a character or a <position, length> pair. Among these, perhaps character "e" appears more frequently than "x", and a <position, length> pair of length 3 might be commoner than one of length 18, say. Thus, if we encode the more frequent in fewer bits and the less frequent in more bits, the total length of the encoded text will be diminished. This consideration suggests that we use Huffman or arithmetic coding, preferably of adaptive kind, along with LZSS.
標簽： algorithm character position either
上傳時間： 2014-01-27
上傳用戶：wang0123456789
