SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU.
標簽： BasicMMU Example project 9261
上傳時間： 2013-12-28
上傳用戶：zhanditian
LCG-2-UserGuide This document gives an overview of the main characteristics of the LCG-2 middleware, which is being used for EGEE. It allows users to understand the building blocks and the available interfaces to the GRID tools in order to run jobs and manage data.
標簽： characteristics middleware LCG UserGuide
上傳時間： 2013-12-21
上傳用戶：風之驕子
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標簽： integrating controller guidelines document
上傳時間： 2013-11-27
上傳用戶：電子世界
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標簽： integrating controller guidelines document
上傳時間： 2015-11-18
上傳用戶：xhz1993
When two dice to seven points and 11 wins When two dice and for two points. Or 3. Or 5 to lose. on the other to continue throwing, if referrals to lose seven, and the last time it won
上傳時間： 2015-11-18
上傳用戶：netwolf
VHDL實現SPI功能源代碼 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.
上傳時間： 2013-12-23
上傳用戶：lx9076
C++ Network Programming, Volume 2, focuses on ACE frameworks, providing thorough coverage of the concepts, patterns, and usage rules that form their structure. This book is a practical guide to designing object-oriented frameworks and shows developers how to apply frameworks to concurrent networked applications. C++ Networking, Volume 1, introduced ACE and the wrapper facades, which are basic network computing ingredients. Volume 2 explains how frameworks build on wrapper facades to provide higher-level communication services.
標簽： Programming frameworks providing coverage
上傳時間： 2013-12-26
上傳用戶：daguda
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the disclaimer below in the documentation and/or other materials provided with the distribution.
標簽： Redistributions copyright condition reproduce
上傳時間： 2013-12-30
上傳用戶：牛津鞋
This is the library for all storage drivers. It simplifies writing a storage driver by implementing 90 percent of the code required to support Plug and Play, Power Management, et cetera. This library is used by disk.sys, cdrom.sys and the tape class drivers. No INF file is needed to install this library. The library is 64-bit compliant.
標簽： storage implementing simplifies drivers
上傳時間： 2014-01-01
上傳用戶：txfyddz
The sfloppy sample is a super floppy driver that resides in the directory \\Ntddk\Src\Storage\sfloppy. It is a class driver for Super Floppy disk drives. It sits a level above the port driver (ATAPI, USB, etc) in the driver stack, and brokers communication between the application level and the port driver. The floppy driver takes requests from filesystem drivers and then sends the appropriate SCSI_REQUEST_BLOCK (SRB) to the port driver. It is compatible with x86 and IA64 platforms.
標簽： NtddkSrcStoragesfloppy directory sfloppy resides
上傳時間： 2015-12-04
上傳用戶：84425894
