The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。 Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM. The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
上傳時間： 2013-10-28
上傳用戶：wujijunshi
介紹幾種cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcontroller has 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to execute C code efficiently. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data RAM options and is available in 16 Kbytes and 8 Kbytes of on-chip ROM/OTPROM or ROMless options.
標簽： architecture introducin peripheral improves
上傳時間： 2015-03-15
上傳用戶：ccclll
This scheme is initiated by Ziv and Lempel [1]. A slightly modified version is described by Storer and Szymanski [2]. An implementation using a binary tree is proposed by Bell [3]. The algorithm is quite simple: Keep a ring buffer, which initially contains "space" characters only. Read several letters from the file to the buffer. Then search the buffer for the longest string that matches the letters just read, and send its length and position in the buffer.
標簽： initiated described modified slightly
上傳時間： 2014-01-09
上傳用戶：sk5201314
Altera recommends the following system configuration: * Pentium II 400 with 512-MB system memory (faster systems give better software performance) * SVGA monitor * CD-ROM drive * One or more of the following I/O ports: - USB port (if using Windows XP or Windows 2000) for USB-Blaster(TM) or MasterBlaster(TM) communications cables, or APU programming unit - Parallel port for ByteBlasterMV(TM) or ByteBlaster(TM) II download cables - Serial port for MasterBlaster communications cable * TCP/IP networking protocol installed * Windows 2000, Windows NT 4.0 with Service Pack 3 or later, or Windows XP * Internet Explorer 5.0 or later Memory & Disk Space Requirements USB開發
標簽： system configuration recommends following
上傳時間： 2015-03-27
上傳用戶：13188549192
TOYFDTD1 is a stripped-down minimalist, 3D FDTD code demonstrating the basic tasks in implementing a simple 3D FDTD simulation. An idealized rectangular waveguide is modeled by treating the interior of the mesh as free space and enforcing PEC conditions on the faces of the mesh. A simplified plane wave source is inserted at one end. First released 12 April 1999. Version 1.03 released 2 December 1999.
標簽： demonstrating stripped-down implementing minimalist
上傳時間： 2013-12-21
上傳用戶：無聊來刷下
* A ncurses user interface. * Network statistics to view the amount of packets and data in many different protocols, interfaces and hosts. * View what active TCP connections are on the network. * View UDP packets. * View and log ICMP packets. * View and log the 48bit arp protocol. And also view what make of network card is in each machine * Multithreaded so that the user interface does not interfere with any of the packet captureing methods. * View and log the following user space protocols FTP, POP3, HTTP
標簽： statistics interface ncurses Network
上傳時間： 2015-04-20
上傳用戶：bjgaofei
This companion disc contains the source code for the sample programs presented in INSIDE VISUAL C++ 5.0, as well as pre- compiled copies of the programs. To copy all of the sample code onto your hard disk, run the SETUP.EXE program and follow the instructions that appear on the screen. The sample code requires about 10 MB of hard disk space.
標簽： companion the presented contains
上傳時間： 2015-05-09
上傳用戶：mhp0114
遺傳算法(Genetic Algorithm, GA)是近幾年發展起來的一種嶄新的全局優化算法，它借 用了生物遺傳學的觀點，通過自然選擇、遺傳、變異等作用機制，實現各個個體的適應性 的提高。這一點體現了自然界中"物競天擇、適者生存"進化過程。1962年Holland教授首次 提出了GA算法的思想，從而吸引了大批的研究者，迅速推廣到優化、搜索、機器學習等方 面，并奠定了堅實的理論基礎。 用遺傳算法解決問題時，首先要對待解決問題的模型結構 和參數進行編碼，一般用字符串表示，這個過程就將問題符號化、離散化了。也有在連續 空間定義的GA(Genetic Algorithm in Continuous Space, GACS)，暫不討論。
上傳時間： 2015-06-08
上傳用戶：stampede
matlab矩陣處理例程。A matrix processor, Matx_Proc() is developed which can be used to process and edit matrices and state space models, and perform various kind of matrix analysis in a visible way.
標簽： Matx_Proc developed processor process
上傳時間： 2015-06-23
上傳用戶：Breathe0125
Windows下讀寫硬件的工具. RW - Read & Write utility, for hardware engineers, firmware (BIOS) engineers, driver developers, QA engineers, performance test engineers, diagnostic engineers, etc., This utility access almost all the computer hardware, including PCI (PCI Express), PCI Index/Data, Memory, Memory Index/Data, I/O Space, I/O Index/Data, Super I/O, Clock Generator, DIMM SPD, SMBus Device, CPU MSR Registers, ATA/ATAPI Identify Data, ACPI Tables Dump (include AML decode), Embedded Controller, USB Information and LPT Remote Access. And also an Command Window is provided to access hardware manually.
標簽： engineers firmware hardware Windows
上傳時間： 2015-07-01
上傳用戶：xc216
