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EoS

  • EoS1b數(shù)據(jù)廣泛用于遙感圖像處理

    EoS1b數(shù)據(jù)廣泛用于遙感圖像處理，所以了解EoS 1b對于遙感的后期應用十分重要！

    標簽： EoS1b 數(shù)據(jù) 圖像處理 遙感

    上傳時間： 2016-01-01

    上傳用戶：253189838

  • HDFDUMP and BRFDUMP are utility programs developed for use with MISR data files. HDFDUMP will ext

    HDFDUMP and BRFDUMP are utility programs developed for use with MISR data files. HDFDUMP will extract data from a MISR file in the HDF-EoS grid format (MISR Level 1B2 and Level 2 files) and writes unformatted binary files. BRFDUMP calculates radiances and bidirectional reflectance factors (BRF) from MISR Level 1B2 files and creates unformatted binary files.

    標簽： HDFDUMP developed programs BRFDUMP

    上傳時間： 2017-04-02

    上傳用戶：yy541071797

  • ESD - Failure Mechanisms and Models

    Failure analysis is invaluable in the learning process of electrostatic discharge (ESD) and electrical overstress (EoS) protection design and development [1–8]. In the failure analysis of EoS, ESD, and latchup events, there are a number of unique failure analysis processes andinformationthatcanprovidesignificantunderstandingandillumination[4].Today,thereis still no design methodology or computer-aided design (CAD) tool which will predict EoS, ESDprotectionlevels,andlatchupinasemiconductorchip;thisisoneofthesignificantreasons why failure analysis is critical to the ESD design discipline.

    標簽： Mechanisms Failure Models ESD and

    上傳時間： 2020-06-05

    上傳用戶：shancjb

  • Basic ESD Design Guidelines

    ESD is a crucial factor for integrated circuits and influences their quality and reliability. Today increasingly sensitive processes with deep sub micron structures are developed. The integration of more and more functionality on a single chip and saving of chip area is required. Integrated circuits become more susceptible to ESD/EoS related damages. However, the requirements on ESD robustness especially for automotive applications are increasing. ESD failures are very often the reason for redesigns. Much research has been conducted by semiconductor manufacturers on ESD robust design.

    標簽： Guidelines Design Basic ESD

    上傳時間： 2020-06-05

    上傳用戶：shancjb

  • ESD-Phenomena-and-the-Reliability

    As we enter the next millennium, there are clear technological patterns. First, the electronic industry continues to scale microelectronic structures to achieve faster devices, new devices, or more per unit area. Secondly, electrostatic charge, electrostatic discharge (ESD), electrical overstress (EoS) and electromagnetic emissions (EMI) continue to be a threat to these scaled structures. This dichotomy presents a dilemma for the scaling of semiconductor technologies and a future threat to new technologies. Technological advancements, material changes, design techniques, and simulation can fend off this growing concern – but to maintain this ever-threatening challenge, one must continue to establish research and education in this issue. 

    標簽： ESD-Phenomena-and-the-Reliability

    上傳時間： 2020-06-05

    上傳用戶：shancjb

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