該系統(tǒng)是一個B/S結(jié)構(gòu)的公司定飯系統(tǒng),整套軟件由JSP編制,希望大家能夠多提寶貴意見,但請不要將它應(yīng)用于商業(yè)環(huán)境,如實在要使用的話,請與作者聯(lián)系!(使用此系統(tǒng)無比要有ORACLE8i以上版本數(shù)據(jù)庫!)
上傳時間: 2014-01-25
上傳用戶:壞壞的華仔
全新的B/S結(jié)構(gòu)開發(fā)方式,用純JS+HTML實現(xiàn)了類似C/S的強大瀏覽器交互,查詢及分頁瀏覽速度提高幾倍,可以成批錄入數(shù)據(jù),有完整的數(shù)據(jù)庫表訪問和純web打印
上傳時間: 2014-01-20
上傳用戶:lacsx
WIN CE Draw 2D GRAPHIC EXAMPLE BASED ON VS2005 SMART DEVICE
標(biāo)簽: GRAPHIC EXAMPLE DEVICE BASED
上傳時間: 2014-03-07
上傳用戶:lvzhr
WINCE 6 , TEXT EXAMPLE, VS2005
標(biāo)簽: EXAMPLE WINCE TEXT 2005
上傳時間: 2016-04-15
上傳用戶:yuchunhai1990
wince 6 dilag example based on vs2005
標(biāo)簽: example wince dilag based
上傳時間: 2014-07-24
上傳用戶:ljt101007
1) Write a function reverse(A) which takes a matrix A of arbitrary dimensions as input and returns a matrix B consisting of the columns of A in reverse order. Thus for example, if A = 1 2 3 then B = 3 2 1 4 5 6 6 5 4 7 8 9 9 8 7 Write a main program to call reverse(A) for the matrix A = magic(5). Print to the screen both A and reverse(A). 2) Write a program which accepts an input k from the keyboard, and which prints out the smallest fibonacci number that is at least as large as k. The program should also print out its position in the fibonacci sequence. Here is a sample of input and output: Enter k>0: 100 144 is the smallest fibonacci number greater than or equal to 100. It is the 12th fibonacci number.
標(biāo)簽: dimensions arbitrary function reverse
上傳時間: 2016-04-16
上傳用戶:waitingfy
learn to use eclipse by example
標(biāo)簽: eclipse example learn use
上傳時間: 2014-01-03
上傳用戶:baitouyu
QTP全名Quick Test Professional,是MI公司出品的一款測試工具.它的優(yōu)點是使用方便,功能強大并且可以通過與測試管理工具的互連達到自動化功能測試的目的. QTP是專門針對B/S模式的測試工具.它具有:識別能力強,回放精確等優(yōu)點,是進行B/S模式下功能測試的首選工具
標(biāo)簽: Professional QTP Quick Test
上傳時間: 2016-04-21
上傳用戶:tyler
求解 形如 a*x^2+b*x+c=0 (mod p)的二次同余方程,其中p為任意素數(shù),a,b,c為任意整數(shù).
上傳時間: 2014-01-11
上傳用戶:er1219
This example describes how to use the ADC and DMA to transfer continuously converted data from ADC to a data buffer. The ADC is configured to converts continuously ADC channel14. Each time an end of conversion occurs the DMA transfers, in circular mode, the converted data from ADC1 DR register to the ADC_ConvertedValue variable. The ADC1 clock is set to 14 MHz.
標(biāo)簽: continuously ADC describes converted
上傳時間: 2014-01-03
上傳用戶:徐孺
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