在深入了解Flash存儲器的基礎上，采用單片機自動檢測存儲器無效塊。主要通過讀取每一塊的第1、第2頁內(nèi)容，判斷該塊的好壞，并給出具體的實現(xiàn)過程，以及部分關鍵的電路原理圖和C語言程序代碼。該設計最終實現(xiàn)單片機自動檢測Flash壞塊的功能，并通過讀取ID號檢測Flash的性能，同時該設計能夠存儲和讀取1GB數(shù)據(jù)。 Abstract: On the basis of in-depth understanding the Flash chips，this paper designs a new program which using the SCM to detect the invalid block.Mainly through reading the data of the first and second page to detect the invalid block.Specific implementation procedure was given,and the key circuit schematic diagram and C language program code was introduced.This design achieved the function of using the MCU checks the invalid block finally，and increased the function by reading the ID number of Flash to get the performance of the memory.And the design also can write and read1GB data
上傳時間： 2013-10-25
上傳用戶：taozhihua1314
介紹一種采用單片機技術和基站器件EM4095的手持式低頻RFID讀卡器方案。首先對整個系統(tǒng)框架進行說明，然后介紹主要功能模塊的設計，給出了各模塊的原理圖。重點描述了基站器件EM4095的性能參數(shù)和功能原理，最后描述了該系統(tǒng)的主程序流程圖。 Abstract: In this paper,a handheld RFID reader based on MCU and EM4095 is introduced.At first，the configuration of this system is explained.Then the design of main modules and schematic documents are particularly presented.The parameters and principle of the chip EM4095 are introduced in detail. At last，the main software flow is given
上傳時間： 2013-10-18
上傳用戶：windypsm
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will show you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part of the document you can find hints how todebounce impulses to enable the use of a simple switch as input device.Authors: Thomas Bliem, CQ Nguyen / Infineon SMI MD Apps
上傳時間： 2013-11-05
上傳用戶：uuuuuuu
為了擴大監(jiān)控范圍，提高資源利用率，降低系統(tǒng)成本，提出了一種多通道視頻切換的解決方案。首先從視頻信號分離出行場信號，然后根據(jù)行場信號由DSP和FPGA產(chǎn)生控制信號，控制多路視頻通道之間的切換，從而實現(xiàn)讓一個視頻處理器同時監(jiān)控不同場景。實驗結果表明，該方案可以在視頻監(jiān)控告警系統(tǒng)中穩(wěn)定、可靠地實現(xiàn)視頻通道的切換。 Abstract: To expand the scope of monitoring， improve resource utilization， reduce system cost， a multiple video channels signal switching method is pointed out in this paper. First， horizontal sync signal and field sync signal from the video signal are separated， then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus， it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably， and is applied in the video monitoring warning system successfully.
上傳時間： 2013-11-09
上傳用戶：不懂夜的黑
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標簽： Base-Station Applications Single-Chip Transceiver
上傳時間： 2013-11-07
上傳用戶：songrui
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
上傳時間： 2013-10-08
上傳用戶：yjj631
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間： 2013-11-01
上傳用戶：dingdingcandy
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
標簽： Methodology Design Reuse FPGA
上傳時間： 2013-10-23
上傳用戶：旗魚旗魚
When I started writing the first edition of RF Power Amplifiers for Wireless Communications,some time back in 1997, it seemed that I was roaming a largely uninhabitedlandscape. For reasons still not clear to me there were few, if any, otherbooks dedicated to the subject of RF power amplifiers. Right at the same time, however,hundreds of engineers were being assigned projects to design PAs for wirelesscommunications products. It was not, therefore, especially difficult to be successfulwith a book that was fortuitously at the right place and the right time.
標簽： Communications Amplifiers Wireless Edition
上傳時間： 2013-11-12
上傳用戶：YYRR
