This lab exercise will introduce you to AccelDSP’s floating- to Fixed-point conversion features. AccelDSP will automatically generate a Fixed-point representation of a floating-point design. This process is controllable by using quantize directives.
ITU-T G.729語音壓縮算法。
description:
Fixed-point description of commendation G.729 with ANNEX B Coding of Speech at 8 kbit/s using Conjugate-Structure Algebraic-Code-Excited Linear-Prediction (CS-ACELP) with Voice Activity Decision(VAD), Discontinuous Transmission(DTX), and Comfort Noise Generation(CNG).
The TMS320C64x™ DSPs (including the TMS320DM642 device) are the highest-performance Fixed-point
DSP generation in the TMS320C6000™ DSP platform. The TMS320DM642 (DM642) device is based on
the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW)
architecture (VelociTI.2™ ) developed by Texas Instruments (TI), making these DSPs an excellent choice
for digital media applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.
