This document contains a detailed description of the usage and configuration of the JSVM [Joint Scalable Video Model] software for the Scalable Video Coding [SVC] project of the Joint Video Team [JVT] of the ISO/IEC Moving Pictures Experts Group [MPEG] and the ITU-T Video Coding Experts Group [VCEG].
It provides information how to build the software on Windows32 and Linux platforms. It contains a description of the usage and configuration for the binaries built from the software package, including examples for spatial, SNR and combined scalability scenarios.
GUIDELINES for the integration and validation of new tools in the software are provided.
This document specifies a subset of the C programming language which is intended to be suitable
for embedded automotive systems up to and including safety integrity level 3 (as defined in the
MISRA GUIDELINES). It contains a list of rules concerning the use of the C programming language
together with justifications and examples.
ESD is a crucial factor for integrated circuits and influences their quality and reliability.
Today increasingly sensitive processes with deep sub micron structures are developed. The
integration of more and more functionality on a single chip and saving of chip area is
required. Integrated circuits become more susceptible to ESD/EOS related damages.
However, the requirements on ESD robustness especially for automotive applications are
increasing. ESD failures are very often the reason for redesigns. Much research has been
conducted by semiconductor manufacturers on ESD robust design.
The Home Gateway Initiative (HGI) is a non-profit making organization which publishes GUIDELINES,
requirements documents, white papers, vision papers, test plans and other documents concerning
broadband equipment and services which are deployed in the home.
This document provides general hardware and layoutconsiderations and GUIDELINES for hardware engineersimplementing a DDR3 memory subsystem.The rules and recommendations in this document serve as aninitial baseline for board designers to begin their specificimplementations, such as fly-by memory topology.
