This book evolved over the past ten years from a set of lecture notes developed while teaching the undergraduate Algorithms course at Berkeley and U.C. San Diego. Our way of teaching this course evolved tremendously over these years in a number of directions, partly to address our students' background (undeveloped formal skills outside of programming), and partly to reect the maturing of the eld in general, as we have come to see it. The notes increasingly crystallized into a narrative, and we progressively structured the course to emphasize the ?story line? implicit in the progression of the material. As a result, the topics were carefully selected and clustered. No attempt was made to be encyclopedic, and this freed us to include topics traditionally de-emphasized or omitted from most Algorithms books.
標簽： Algorithms 算法
上傳時間： 2013-11-11
上傳用戶：JamesB
西門子PLC S7-200編程軟件最新版本(2012.3) STEP7 MicroWIN_V4 SP9 完整版, 全面支持Windows7。安裝完后，打開軟件，初次為英文版，點擊tools（左上角自左-右第6個）然后選擇最下面的options（自上而下第15個）單擊，出現又一個畫面，在左邊選擇第一個選項General，就出現了語言選項，選擇最下面的那個（Chinese）也就是中文。然后點擊OK按鈕，然后一路回車下去，直到軟件關閉，再打開時就是中文的啦！
上傳時間： 2013-11-19
上傳用戶：mikesering
Altium Designer 10是由Altium公司推出的一款開發軟件，Altium Designer 10綜合了電子產品一體化開發所需的所有必須技術和功能。Altium Designer 在單一設計環境中集成板級和FPGA系統設計、基于FPGA和分立處理器的嵌入式軟件開發以及PCB版圖設計、編輯和制造。并集成了現代設計數據管理功能,使得Altium Designer成為電子產品開發的完整解決方案－一個既滿足當前，也滿足未來開發需求的解決方案。 Altium Designer10 為您帶來了一個全新的管理元 Altium Designer release 10器件的方法。其中包括新的用途系統、修改管理、新的生命周期和審批制度、實時供應鏈管理等更多的新功能! Altium Designer 10安裝流程： 安裝完后復制 AD10.Crack 文件夾下文件到安裝目錄。 1.運行AD10KeyGen，點擊“打開模板”，加載license.ini，如想修改注冊名，只需修改：TransactorName=Your Name，其中Your Name用你自己的名字替換，其它參數在單機版的情況下無需修改； 2.點擊“生成協議”，保存生成的alf文件(文件名任意，如“jack ”)，并將其放到你的安裝目錄下； 3.將patch.exe放到你的安裝目錄下，運行patch，對安裝目錄下的dxp.exe文件補丁，注意運行破解時軟件沒有運行； 4.啟動DXP，運行菜單DXP->My Account，點擊Add Standalone License file，加載前面生成的license（.alf）文件后即能正常使用了。 資源是.bin格式的鏡像文件，到網上下一個UltraISO打開后另存為iso或isz格式，用DAEMON Tools Lite虛擬光驅打開就能安裝了。(或者安裝一個快壓打開) 安裝提醒： 安裝時有兩個路徑選擇，第一個是安裝主程序的；第二個是放置設計樣例、元器件庫文件、模板文件的，共3.3GB。如果你的C盤留的不夠大，建議將3GB多的東西和主程序安裝在一塊兒。 安裝完成后界面可能是英文的，如果想調出中文界面，則可以：DXP-->Preferences-->System-->General-->Localization--選中Use localized resources，保存設置后重新啟動程序就有中文菜單了。 Altium Designer 10破解方法： 安裝包里已經帶有破解文件了，但沒有AD10KeyGen這個文件，所以要把注冊名改成自己的名字不方便。 1.運行AD10KeyGen，點擊“打開模板”，加載license.ini，如想修改注冊名，只需修改： TransactorName=Your Name 其中Your Name用你自己的名字替換，其它參數在單機版的情況下無需修改； 2.點擊“生成協議”，保存生成的alf文件(文件名任意，如“jack ”)，并將其放到你的安裝目錄下； 3.將patch.exe放到你的安裝目錄下，運行patch，對安裝目錄下的dxp.exe文件補丁，注意運行破解時軟件沒有運行； 4.啟動DXP，運行菜單DXP->My Account，點擊Add Standalone License file，加載前面生成的license（.alf）文件后即能正常使用了。 注意： 1.局域網內用同一license不再提示沖突 2.僅供學習研究使用，勿用于非法用途。 相關資料：altium designer 10 破解教程
上傳時間： 2013-11-10
上傳用戶：葉立炫95
基本的編輯工具(GENERAL EDITING FACILITIES) 對象放置(Object Placement) ISIS支持多種類型的對象，每一類型對象的具體作用和功能將在下一章給出。雖然類型不同，但放置對象的基本步驟都是一樣的。 放置對象的步驟如下(To place an object:) 1.根據對象的類別在工具箱選擇相應模式的圖標(mode icon)。 2. Select the sub-mode icon for the specific type of object. 2、根據對象的具體類型選擇子模式圖標(sub-mode icon)。 3、如果對象類型是元件、端點、管腳、圖形、符號或標記，從選擇器里(selector)選擇你想要的對象的名字。對于元件、端點、管腳和符號，可能首先需要從庫中調出。 4、如果對象是有方向的，將會在預覽窗口顯示出來，你可以通過點擊旋轉和鏡象圖標來調整對象的朝向。 5、最后，指向編輯窗口并點擊鼠標左鍵放置對象。對于不同的對象，確切的步驟可能略有不同，但你會發現和其它的圖形編輯軟件是類似的，而且很直觀。 選中對象(Tagging an Object) 用鼠標指向對象并點擊右鍵可以選中該對象。該操作選中對象并使其高亮顯示，然后可以進行編輯。
上傳時間： 2013-10-29
上傳用戶：avensy
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
標簽： Considerations Guidelines and Design
上傳時間： 2013-11-09
上傳用戶：ls530720646
This application note provides users with a general understanding of the SVF and XSVF fileformats as they apply to Xilinx devices. Some familiarity with IEEE STD 1149.1 (JTAG) isassumed. For information on using Serial Vector Format (SVF) and Xilinx Serial Vector Format(XSVF) files in embedded programming applications
上傳時間： 2015-01-02
上傳用戶：時代將軍
USB接口控制器參考設計,xilinx提供VHDL代碼 usb xilinx vhdl ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上傳時間： 2013-10-29
上傳用戶：zhouchang199
LAYOUT REPORT .............. 1 目錄.................. 1 1. PCB LAYOUT 術語解釋(TERMS)......... 2 2. Test Point : ATE 測試點供工廠ICT 測試治具使用............ 2 3. 基準點 (光學點) -for SMD:........... 4 4. 標記 (LABEL ING)......... 5 5. VIA HOLE PAD................. 5 6. PCB Layer 排列方式...... 5 7.零件佈置注意事項 (PLACEMENT NOTES)............... 5 8. PCB LAYOUT 設計............ 6 9. Transmission Line ( 傳輸線 )..... 8 10.General Guidelines – 跨Plane.. 8 11. General Guidelines – 繞線....... 9 12. General Guidelines – Damping Resistor. 10 13. General Guidelines - RJ45 to Transformer................. 10 14. Clock Routing Guideline........... 12 15. OSC & CRYSTAL Guideline........... 12 16. CPU
上傳時間： 2013-10-29
上傳用戶：1234xhb
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
基于通用集成運算放大器，利用MASON公式設計了一個多功能二階通用濾波器，能同時或分別實現低通、高通和帶通濾波，也能設計成一個正交振蕩器。電路的極點頻率和品質因數能夠獨立、精確地調節。電路使用4個集成運放、2個電容和11個電阻，所有集成運放的反相端虛地。利用計算機仿真電路的通用濾波功能、極點頻率和品質因數的獨立控制和正交正弦振蕩，從而證明該濾波器正確有效。 Abstract: A new multifunctional second-order filter based on OPs was presented by MASON formula. Functions， such as high-pass， band-pass， low-pass filtering， can be realized respectively and simultaneously， and can become a quadrature oscillator by modifying resistance ratio. Its pole angular frequency and quality factor can be tuned accurately and independently. The circuit presented contains four OPs， two capacitors， and eleven resistances， and inverting input of all OPs is virtual ground. Its general filtering， the independent control of pole frequency and quality factor and quadrature sinusoidal oscillation were simulated by computer， and the result shows that the presented circuit is valid and effective.
上傳時間： 2013-10-09
上傳用戶：13788529953
