The LTP5901 and LTP5902 require little external circuitry, as the devices references,decoupling and power supply filtering are integrated. The LTP5901 and LTP5902 will bemodularly certified for operation in the United States (FCC), Canada (IC) and theEuropean Union (CE).
標(biāo)簽： Integration LTP HARDWARE Guide
上傳時(shí)間： 2013-11-22
上傳用戶：sunchao524
Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and HARDWARE files are included.
標(biāo)簽： MAXREFDES Lakewood Isolated Output
上傳時(shí)間： 2013-11-02
上傳用戶：fengzimili
Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and HARDWARE files are included.
標(biāo)簽： Riverside MAXREFDES Isolated Output
上傳時(shí)間： 2013-11-16
上傳用戶：會稽劍客
Abstract: This document details the Oceanside (MAXREFDES9#) subsystem reference design, a 3.3V to 15V input,±15V (±12V) output, isolated power supply. The Oceanside design includes a high-efficiency step-up controller, a36V H-bridge transformer driver for isolated supplies, a wide input range, and adjustable output low-dropout linearregulator (LDO). Test results and HARDWARE files are included.
標(biāo)簽： 隔離電源 設(shè)計(jì)手冊
上傳時(shí)間： 2013-10-12
上傳用戶：jinyao
Power over Ethernet (PoE) is a new development thatallows for the delivery of power to Ethernet-based devicesvia standard Ethernet CAT5 cable, precluding the need forwall adapters or other external power sources. The PoEspecification defines a HARDWARE detection protocol wherePower Sourcing Equipment (PSE) is able to identify PoEPowered Devices (PDs), thus allowing full backwardscompatibility with non-PoE-aware (legacy) Ethernetdevices.
標(biāo)簽： PoE 電池電路 擴(kuò)展 以太網(wǎng)供電
上傳時(shí)間： 2013-11-11
上傳用戶：daoyue
STM32，5110液晶顯示聲納探魚器200KHz，帶電路圖，精確到厘米 MC34063升壓，大聲壓發(fā)射，實(shí)際板子上濾波電路沒要（電路圖上的濾波電阻電容電感沒焊，開路或者短路）。一般200KHz的換能器在水里面的耦合比較好，在空氣中發(fā)射出來的（或者接收的）強(qiáng)度很低。 用的MOSFET Relay，contact和release時(shí)間都可以做到很小，不過選的是比較低端器件，所以最近測量距離為70cm。 開源啦開源啦 架構(gòu)為狀態(tài)機(jī)+任務(wù)流，Task都是放在函數(shù)指針數(shù)組里面的 Task分兩種，routine的和錯(cuò)誤處理的 5110液晶的SPI用的DMA 基本上STM32和C語言高階的特征都用上了，稍微修改直接可以商用 Open Issue 偶爾會HARDWARE fault或者memory fault，然后watchdog重啟， 應(yīng)該比較好解決，仔細(xì)檢查下就好 有什么問題代碼的file comment里面有我聯(lián)系地址 有能搞到好的器件也請知會我，多謝了 接下來準(zhǔn)備把它裝到船模上，用以前四軸的那套東西，就看什么時(shí)候有時(shí)間了
上傳時(shí)間： 2013-10-28
上傳用戶：songyue1991
為了提高PCB板制作的效率，改變傳統(tǒng)的化學(xué)腐蝕制板工藝，使用機(jī)械仿形銑制作電路板的方法，設(shè)計(jì)了以ATMEGA16單片機(jī)為核心部件的PCB板雕刻機(jī)控制系統(tǒng)。其中包括PCB雕刻機(jī)的基本功能、主要硬件電路設(shè)計(jì)和軟件的實(shí)現(xiàn)流程，并給出了相關(guān)設(shè)計(jì)電路。重點(diǎn)分析了雕刻機(jī)步進(jìn)電機(jī)的驅(qū)動(dòng)電路以及主軸電機(jī)的驅(qū)動(dòng)電路，該雕刻機(jī)經(jīng)實(shí)際運(yùn)行，系統(tǒng)工作良好，可有效提高PCB板的制作效率。 Abstract: In order to improve the efficiency of production of PCB board and change the traditional chemical etching plates， using of mechanical copying milling method makes circuit boards，this paper introduces the PCB engraving machine control system used ATMEGA16 microcomputer as the core components. It includes basic function， the HARDWARE circuit design and software realization process， and gives the corresponding circuit design.It analyses the drive circuit of engrawing machine stepper motor and spindle motor in detail. This engraving machine by practical operation， the system works well， which can effectively improve the production efficiency of PCB board.
上傳時(shí)間： 2013-10-17
上傳用戶：liangliang123
HIGH SPEED 8051 μC CORE - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz System Clock - 22 Vectored Interrupt Sources MEMORY - 4352 Bytes Internal Data RAM (256 + 4k) - 64k Bytes In-System Programmable FLASH Program Memory - External Parallel Data Memory Interface – up to 5Mbytes/sec DIGITAL PERIPHERALS - 64 Port I/O; All are 5V tolerant - HARDWARE SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently - Programmable 16-bit Counter/Timer Array with 5 Capture/Compare Modules - 5 General Purpose 16-bit Counter/Timers - Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE ........................ 2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 100-Pin TQFP (64-Pin Version Available) Temperature Range: –40°C to +85°C
標(biāo)簽： C8051F020
上傳時(shí)間： 2013-10-12
上傳用戶：lalalal
為解決當(dāng)前計(jì)算機(jī)串行通訊接口只有USB，難以滿足舊型號設(shè)備或某些單片機(jī)要求RS232通訊的問題，設(shè)計(jì)出兩款RS232/USB電路。采用CH341A與MAX223集成電路芯片構(gòu)建標(biāo)準(zhǔn)9線RS232/USB通用接口轉(zhuǎn)換器，無需編程。采用CH341A與PIC16F877A構(gòu)建單片機(jī)與計(jì)算機(jī)之間的USB通訊電路，軟件遵循RS232通訊協(xié)議，硬件進(jìn)行電平轉(zhuǎn)換。實(shí)際使用表明，這兩款產(chǎn)品與計(jì)算機(jī)端Windows 操作系統(tǒng)下的串口應(yīng)用程序完全兼容，且通訊過程中無握手失敗現(xiàn)象。 Abstract: To solve the problem that current computer serial communication only with USB interface can not satisfy with the old type equipments or MCU to communicate with RS232， two kinds of RS232/USB circuit were designed.CH341A and MAX223 integrated circuit chips were used to create a standard 9-line RS232/USB universal interface convertor without programme. CH341A and PIC16F877A chips were adopted to build the USB communication circuit between computers and MCU. The software follows RS232 communication protocol， and the HARDWARE converts electrical levels. Actual practices indicate that the two manufactures are compatible with serial application program of Windows operation system completely，and get avoid of handshake lost.
上傳時(shí)間： 2013-11-03
上傳用戶：siying
AVR32801: UC3A3 Schematic Checklist Features • Power circuit • Reset circuit • USB connection • External bus interface • ABDAC sound DAC interface • JTAG and Nexus debug ports • Clocks and crystal oscillators • MMC, SD-card, SDHC, SDIO and CE-ATA interface 1 Introduction A good HARDWARE design comes from a proper schematic. Since UC3A3 devices have a fair number of pins and functions, the schematic for these devices can be large and quite complex. This application note describes a common checklist which should be used when starting and reviewing the schematics for a UC3A3 design.
標(biāo)簽： Schematic 32801 UC3A3 Chec
上傳時(shí)間： 2014-12-26
上傳用戶：DXM35
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