his packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise. The packet include: 1) Packet Builder (Viterbi Encoding, Interleaver, PN generation) 2) Modulator (RRC filter) 3) Demodulator (Matched Filter, RAKE receiver) 4) Receiver (HD or SD) (Deinterleaver, Viterbi Decoder). You should run "Simulation.m" function that include all modules.
標簽： simulation baseband channel packet
上傳時間： 2013-12-23
上傳用戶：zhangyigenius
1602A.asm 為驅動1602液晶顯示器顯示一個字母A的源程序。 1600logo.asm 為驅動1602液晶顯示器（HD44780兼容芯片） 160209.asm 為1602液晶顯示器（HD44780兼容芯片）的全屏顯示0-9驅動程序 1602key.asm 小鍵盤控制的1602液晶顯示器。
上傳時間： 2013-12-21
上傳用戶：731140412
Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.
標簽： Testbenches enabling integral process
上傳時間： 2016-03-24
上傳用戶：1109003457
This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise. The packet include: 1) Packet Builder (Viterbi Encoding, Interleaver, PN generation) 2) Modulator (RRC filter) 3) Demodulator (Matched Filter, RAKE receiver) 4) Receiver (HD or SD) (Deinterleaver, Viterbi Decoder).
標簽： simulation baseband channel packet
上傳時間： 2014-12-20
上傳用戶：ukuk
Spectrum Digital, Inc的 詳細的 DM6467開發資料！DaVinciHD_EVM_TechRef_RevD，This is the primary location for all Davinci HD EVM related documentation, notes and errata. This version of the page applies to the lastest shipping version. Here is a complete version history:DaVinci HD Schematics Board schematics
標簽： DaVinciHD_EVM_TechRef_RevD Spectrum Digital 6467
上傳時間： 2016-11-27
上傳用戶：huql11633
The Window Design Method The basic idea behind the design of linear-phase FIR filters using the window method is to choose a proper ideal frequency-selective filter [which always has a noncausal, infinite duration impulse response] and then truncate its impulse response HD[n] to obtain a linear-phase and causal FIR filter h[n]. To truncate the impulse response of the ideal filter a time window w[n] is used. Available windows in Matlab are rectangular [or boxcar in Matlab], bartlett, hamming, hanning
標簽： linear-phase The the filters
上傳時間： 2017-03-20
上傳用戶：PresidentHuang
我寫的一個小OS~~，基于X86 必須使用Gcc在Linux下編譯，可安裝在HD或Floppy。
標簽： OS
上傳時間： 2017-05-09
上傳用戶：ghostparker
The STi7105 uses state of the art process technology to provide an ultra low-cost, fully featured HD AVC decoder IC. It is a highly integrated system-on-chip suitable for STB markets across all networks (cable/satellite/DTT/x- DSL/IP) worldwide
標簽： technology low-cost featured process
上傳時間： 2013-12-22
上傳用戶：時代電子小智
The STi7200 is a new generation, high-definition set-top box/DVD decoder chip, and provides very high performance for low-cost HD systems. With enhanced performance over the STx7109, it includes both Windows Media Video 9 and H.264 video decoders for new, low bitrate applications. The STi7200 is able to decode two HD programs
標簽： high-definition generation provides decoder
上傳時間： 2013-11-29
上傳用戶：xg262122
HDQ通信協議概述： HDQ通信協議是美國德州儀器的單線通信協議。智能電池的檢測模塊就是用這個協議?？梢酝ㄟ^HDQ采集到電池電量、溫度、電壓、充電狀態等信息.
標簽： HDq MPS430
上傳時間： 2015-06-04
上傳用戶：19950111
