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  • Analog Circuit Design in Porta

    •Founded in Jan. 08, 2001 in Shanghai, China.•Fabless IDH focused on Analog & Mixed Signal Chip design & marketing •Over 100 IC introduced.•Over 200 OEM Customer worldwide•ISO-9000 Certified•Distribution Channel in Taiwan, China & Japan To achieve 100% customer satisfactionby producing the technically advanced product with the best quality, on-time delivery and service. Leverages on proprietary process and world-class engineering team to develop innovative & high quality analog solutions that add value to electronics equipment.

    標(biāo)簽: Circuit Analog Design Porta

    上傳時(shí)間: 2013-10-24

    上傳用戶:songnanhua

  • High-Speed Digital System desi

    前面討論了很多內(nèi)容,基本上涉及了有關(guān)PCB板的絕大部分相關(guān)的知識(shí)。第二章探討了傳輸線的基本原理,第三章探討了串?dāng)_,在第四章里我們闡述了許多在現(xiàn)代設(shè)計(jì)中必須關(guān)注的非理想互連的問題。對(duì)于信號(hào)從驅(qū)動(dòng)端引腳到接收端引腳的電氣路徑的相關(guān)問題,我們已經(jīng)做了一些探究,然而對(duì)于硅芯片,即處于封裝內(nèi)部的IC來說,其信號(hào)傳輸通常要通過過孔和連接器來進(jìn)行,對(duì)這樣的情況我們?cè)撊绾翁幚恚吭诒菊轮校覀儗⑼ㄟ^對(duì)封裝、過孔和連接器的研究,闡述其原理,從而指導(dǎo)大家在設(shè)計(jì)的時(shí)候?qū)φ麄€(gè)電氣路徑進(jìn)行完整地分析,即從驅(qū)動(dòng)端內(nèi)部IC芯片的焊盤到接受器IC芯片的焊盤。

    標(biāo)簽: High-Speed Digital System desi

    上傳時(shí)間: 2013-11-24

    上傳用戶:maizezhen

  • 高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf

    高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標(biāo)簽: 高速數(shù)字 系統(tǒng)設(shè)計(jì)

    上傳時(shí)間: 2013-10-26

    上傳用戶:縹緲

  • 射頻集成電路設(shè)計(jì)John Rogers(Radio Freq

    Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

    標(biāo)簽: Rogers Radio John Freq

    上傳時(shí)間: 2014-12-23

    上傳用戶:han_zh

  • High-speed Digital Design 中文版(高速數(shù)字設(shè)計(jì))

    介紹高速電路的設(shè)計(jì)

    標(biāo)簽: High-speed Digital Design 高速數(shù)字

    上傳時(shí)間: 2013-10-16

    上傳用戶:yt1993410

  • 多層印制板設(shè)計(jì)基本要領(lǐng)

    【摘要】本文結(jié)合作者多年的印制板設(shè)計(jì)經(jīng)驗(yàn),著重印制板的電氣性能,從印制板穩(wěn)定性、可靠性方面,來討論多層印制板設(shè)計(jì)的基本要求。【關(guān)鍵詞】印制電路板;表面貼裝器件;高密度互連;通孔【Key words】Printed Circuit Board;Surface Mounting Device;High Density Interface;Via一.概述印制板(PCB-Printed Circuit Board)也叫印制電路板、印刷電路板。多層印制板,就是指兩層以上的印制板,它是由幾層絕緣基板上的連接導(dǎo)線和裝配焊接電子元件用的焊盤組成,既具有導(dǎo)通各層線路,又具有相互間絕緣的作用。隨著SMT(表面安裝技術(shù))的不斷發(fā)展,以及新一代SMD(表面安裝器件)的不斷推出,如QFP、QFN、CSP、BGA(特別是MBGA),使電子產(chǎn)品更加智能化、小型化,因而推動(dòng)了PCB工業(yè)技術(shù)的重大改革和進(jìn)步。自1991年IBM公司首先成功開發(fā)出高密度多層板(SLC)以來,各國(guó)各大集團(tuán)也相繼開發(fā)出各種各樣的高密度互連(HDI)微孔板。這些加工技術(shù)的迅猛發(fā)展,促使了PCB的設(shè)計(jì)已逐漸向多層、高密度布線的方向發(fā)展。多層印制板以其設(shè)計(jì)靈活、穩(wěn)定可靠的電氣性能和優(yōu)越的經(jīng)濟(jì)性能,現(xiàn)已廣泛應(yīng)用于電子產(chǎn)品的生產(chǎn)制造中。下面,作者以多年設(shè)計(jì)印制板的經(jīng)驗(yàn),著重印制板的電氣性能,結(jié)合工藝要求,從印制板穩(wěn)定性、可靠性方面,來談?wù)劧鄬又瓢逶O(shè)計(jì)的基本要領(lǐng)。

    標(biāo)簽: 多層 印制板

    上傳時(shí)間: 2013-11-19

    上傳用戶:zczc

  • 高性能覆銅板的發(fā)展趨勢(shì)及對(duì)環(huán)氧樹脂性能的新需求

    討論、研究高性能覆銅板對(duì)它所用的環(huán)氧樹脂的性能要求,應(yīng)是立足整個(gè)產(chǎn)業(yè)鏈的角度去觀察、分析。特別應(yīng)從HDI多層板發(fā)展對(duì)高性能CCL有哪些主要性能需求上著手研究。HDI多層板有哪些發(fā)展特點(diǎn),它的發(fā)展趨勢(shì)如何——這都是我們所要研究的高性能CCL發(fā)展趨勢(shì)和重點(diǎn)的基本依據(jù)。而HDI多層板的技術(shù)發(fā)展,又是由它的應(yīng)用市場(chǎng)——終端電子產(chǎn)品的發(fā)展所驅(qū)動(dòng)(見圖1)。 圖1 在HDI多層板產(chǎn)業(yè)鏈中各類產(chǎn)品對(duì)下游產(chǎn)品的性能需求關(guān)系圖 1.HDI多層板發(fā)展特點(diǎn)對(duì)高性能覆銅板技術(shù)進(jìn)步的影響1.1 HDI多層板的問世,對(duì)傳統(tǒng)PCB技術(shù)及其基板材料技術(shù)是一個(gè)嚴(yán)峻挑戰(zhàn)20世紀(jì)90年代初,出現(xiàn)新一代高密度互連(High Density Interconnection,簡(jiǎn)稱為 HDI)印制電路板——積層法多層板(Build—Up Multiplayer printed board,簡(jiǎn)稱為 BUM)的最早開發(fā)成果。它的問世是全世界幾十年的印制電路板技術(shù)發(fā)展歷程中的重大事件。積層法多層板即HDI多層板,至今仍是發(fā)展HDI的PCB的最好、最普遍的產(chǎn)品形式。在HDI多層板之上,將最新PCB尖端技術(shù)體現(xiàn)得淋漓盡致。HDI多層板產(chǎn)品結(jié)構(gòu)具有三大突出的特征:“微孔、細(xì)線、薄層化”。其中“微孔”是它的結(jié)構(gòu)特點(diǎn)中核心與靈魂。因此,現(xiàn)又將這類HDI多層板稱作為“微孔板”。HDI多層板已經(jīng)歷了十幾年的發(fā)展歷程,但它在技術(shù)上仍充滿著朝氣蓬勃的活力,在市場(chǎng)上仍有著前程廣闊的空間。

    標(biāo)簽: 性能 發(fā)展趨勢(shì) 覆銅板 環(huán)氧樹脂

    上傳時(shí)間: 2013-11-22

    上傳用戶:gundan

  • pci e PCB設(shè)計(jì)規(guī)范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標(biāo)簽: pci PCB 設(shè)計(jì)規(guī)范

    上傳時(shí)間: 2013-10-15

    上傳用戶:busterman

  • 確保電解電容器的壽命長(zhǎng)-LED燈泡為例

    Abstract: Electrolytic capacitors are notorious for short lifetimes in high-temperature applications such asLED light bulbs. The careful selection of these devices with proper interpretation of their specifications isessential to ensure that they do not compromise the life of the end product. This application notediscusses this problem with electrolytic capacitors in LED light bulbs and provides an analysis that showshow it is possible to use electrolytics in such products.  

    標(biāo)簽: LED 電解電容器 壽命

    上傳時(shí)間: 2013-11-17

    上傳用戶:asdfasdfd

  • 模塊電源功能性參數(shù)指標(biāo)及測(cè)試方法

      模塊電源的電氣性能是通過一系列測(cè)試來呈現(xiàn)的,下列為一般的功能性測(cè)試項(xiàng)目,詳細(xì)說明如下: 電源調(diào)整率(Line Regulation) 負(fù)載調(diào)整率(Load Regulation) 綜合調(diào)整率(Conmine Regulation) 輸出漣波及雜訊(Ripple & Noise) 輸入功率及效率(Input Power, Efficiency) 動(dòng)態(tài)負(fù)載或暫態(tài)負(fù)載(Dynamic or Transient Response) 起動(dòng)(Set-Up)及保持(Hold-Up)時(shí)間 常規(guī)功能(Functions)測(cè)試 1. 電源調(diào)整率   電源調(diào)整率的定義為電源供應(yīng)器于輸入電壓變化時(shí)提供其穩(wěn)定輸出電壓的能力。測(cè)試步驟如下:于待測(cè)電源供應(yīng)器以正常輸入電壓及負(fù)載狀況下熱機(jī)穩(wěn)定后,分別于低輸入電壓(Min),正常輸入電壓(Normal),及高輸入電壓(Max)下測(cè)量并記錄其輸出電壓值。 電源調(diào)整率通常以一正常之固定負(fù)載(Nominal Load)下,由輸入電壓變化所造成其輸出電壓偏差率(deviation)的百分比,如下列公式所示:   [Vo(max)-Vo(min)] / Vo(normal) 2. 負(fù)載調(diào)整率   負(fù)載調(diào)整率的定義為開關(guān)電源于輸出負(fù)載電流變化時(shí),提供其穩(wěn)定輸出電壓的能力。測(cè)試步驟如下:于待測(cè)電源供應(yīng)器以正常輸入電壓及負(fù)載狀況下熱機(jī)穩(wěn)定后,測(cè)量正常負(fù)載下之輸出電壓值,再分別于輕載(Min)、重載(Max)負(fù)載下,測(cè)量并記錄其輸出電壓值(分別為Vo(max)與Vo(min)),負(fù)載調(diào)整率通常以正常之固定輸入電壓下,由負(fù)載電流變化所造成其輸出電壓偏差率的百分比,如下列公式所示:   [Vo(max)-Vo(min)] / Vo(normal)    3. 綜合調(diào)整率   綜合調(diào)整率的定義為電源供應(yīng)器于輸入電壓與輸出負(fù)載電流變化時(shí),提供其穩(wěn)定輸出電壓的能力。這是電源調(diào)整率與負(fù)載調(diào)整率的綜合,此項(xiàng)測(cè)試系為上述電源調(diào)整率與負(fù)載調(diào)整率的綜合,可提供對(duì)電源供應(yīng)器于改變輸入電壓與負(fù)載狀況下更正確的性能驗(yàn)證。 綜合調(diào)整率用下列方式表示:于輸入電壓與輸出負(fù)載電流變化下,其輸出電壓之偏差量須于規(guī)定之上下限電壓范圍內(nèi)(即輸出電壓之上下限絕對(duì)值以內(nèi))或某一百分比界限內(nèi)。 4. 輸出雜訊   輸出雜訊(PARD)系指于輸入電壓與輸出負(fù)載電流均不變的情況下,其平均直流輸出電壓上的周期性與隨機(jī)性偏差量的電壓值。輸出雜訊是表示在經(jīng)過穩(wěn)壓及濾波后的直流輸出電壓上所有不需要的交流和噪聲部份(包含低頻之50/60Hz電源倍頻信號(hào)、高于20 KHz之高頻切換信號(hào)及其諧波,再與其它之隨機(jī)性信號(hào)所組成)),通常以mVp-p峰對(duì)峰值電壓為單位來表示。   一般的開關(guān)電源的規(guī)格均以輸出直流輸出電壓的1%以內(nèi)為輸出雜訊之規(guī)格,其頻寬為20Hz到20MHz。電源實(shí)際工作時(shí)最惡劣的狀況(如輸出負(fù)載電流最大、輸入電源電壓最低等),若電源供應(yīng)器在惡劣環(huán)境狀況下,其輸出直流電壓加上雜訊后之輸出瞬時(shí)電壓,仍能夠維持穩(wěn)定的輸出電壓不超過輸出高低電壓界限情形,否則將可能會(huì)導(dǎo)致電源電壓超過或低于邏輯電路(如TTL電路)之承受電源電壓而誤動(dòng)作,進(jìn)一步造成死機(jī)現(xiàn)象。   同時(shí)測(cè)量電路必須有良好的隔離處理及阻抗匹配,為避免導(dǎo)線上產(chǎn)生不必要的干擾、振鈴和駐波,一般都采用雙同軸電纜并以50Ω于其端點(diǎn)上,并使用差動(dòng)式量測(cè)方法(可避免地回路之雜訊電流),來獲得正確的測(cè)量結(jié)果。 5. 輸入功率與效率   電源供應(yīng)器的輸入功率之定義為以下之公式:   True Power = Pav(watt) = Vrms x Arms x Power Factor 即為對(duì)一周期內(nèi)其輸入電壓與電流乘積之積分值,需注意的是Watt≠VrmsArms而是Watt=VrmsArmsxP.F.,其中P.F.為功率因素(Power Factor),通常無功率因素校正電路電源供應(yīng)器的功率因素在0.6~0.7左右,其功率因素為1~0之間。   電源供應(yīng)器的效率之定義為為輸出直流功率之總和與輸入功率之比值。效率提供對(duì)電源供應(yīng)器正確工作的驗(yàn)證,若效率超過規(guī)定范圍,即表示設(shè)計(jì)或零件材料上有問題,效率太低時(shí)會(huì)導(dǎo)致散熱增加而影響其使用壽命。 6. 動(dòng)態(tài)負(fù)載或暫態(tài)負(fù)載   一個(gè)定電壓輸出的電源,于設(shè)計(jì)中具備反饋控制回路,能夠?qū)⑵漭敵鲭妷哼B續(xù)不斷地維持穩(wěn)定的輸出電壓。由于實(shí)際上反饋控制回路有一定的頻寬,因此限制了電源供應(yīng)器對(duì)負(fù)載電流變化時(shí)的反應(yīng)。若控制回路輸入與輸出之相移于增益(Unity Gain)為1時(shí),超過180度,則電源供應(yīng)器之輸出便會(huì)呈現(xiàn)不穩(wěn)定、失控或振蕩之現(xiàn)象。實(shí)際上,電源供應(yīng)器工作時(shí)的負(fù)載電流也是動(dòng)態(tài)變化的,而不是始終維持不變(例如硬盤、軟驅(qū)、CPU或RAM動(dòng)作等),因此動(dòng)態(tài)負(fù)載測(cè)試對(duì)電源供應(yīng)器而言是極為重要的。可編程序電子負(fù)載可用來模擬電源供應(yīng)器實(shí)際工作時(shí)最惡劣的負(fù)載情況,如負(fù)載電流迅速上升、下降之斜率、周期等,若電源供應(yīng)器在惡劣負(fù)載狀況下,仍能夠維持穩(wěn)定的輸出電壓不產(chǎn)生過高激(Overshoot)或過低(Undershoot)情形,否則會(huì)導(dǎo)致電源之輸出電壓超過負(fù)載組件(如TTL電路其輸出瞬時(shí)電壓應(yīng)介于4.75V至5.25V之間,才不致引起TTL邏輯電路之誤動(dòng)作)之承受電源電壓而誤動(dòng)作,進(jìn)一步造成死機(jī)現(xiàn)象。 7. 啟動(dòng)時(shí)間與保持時(shí)間   啟動(dòng)時(shí)間為電源供應(yīng)器從輸入接上電源起到其輸出電壓上升到穩(wěn)壓范圍內(nèi)為止的時(shí)間,以一輸出為5V的電源供應(yīng)器為例,啟動(dòng)時(shí)間為從電源開機(jī)起到輸出電壓達(dá)到4.75V為止的時(shí)間。   保持時(shí)間為電源供應(yīng)器從輸入切斷電源起到其輸出電壓下降到穩(wěn)壓范圍外為止的時(shí)間,以一輸出為5V的電源供應(yīng)器為例,保持時(shí)間為從關(guān)機(jī)起到輸出電壓低于4.75V為止的時(shí)間,一般值為17ms或20ms以上,以避免電力公司供電中于少了半周或一周之狀況下而受影響。    8. 其它 在電源具備一些特定保護(hù)功能的前提下,還需要進(jìn)行保護(hù)功能測(cè)試,如過電壓保護(hù)(OVP)測(cè)試、短路保護(hù)測(cè)試、過功保護(hù)等

    標(biāo)簽: 模塊電源 參數(shù) 指標(biāo) 測(cè)試方法

    上傳時(shí)間: 2013-10-22

    上傳用戶:zouxinwang

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