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High-speed

  • 1A SIMPLE STEP-DOWN SWITCHING

    The TL2575 and TL2575HV represent superior alternatives to popular three-terminal linear regulators. Due totheir high efficiency, the devices significantly reduce the size of the heatsink and, in many cases, no heatsink isrequired. Optimized for use with standard series of inductors available from several different manufacturers, theTL2575 and TL2575HV greatly simplify the design of switch-mode power supplies by requiring a minimaladdition of only four to six external components for operation.

    標簽: STEP-DOWN SWITCHING SIMPLE 1A

    上傳時間: 2013-11-20

    上傳用戶:jelenecheung

  • DUAL DIGITAL ISOLATORS

    The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.

    標簽: ISOLATORS DIGITAL DUAL

    上傳時間: 2013-10-24

    上傳用戶:hbsunhui

  • 基于單DSP的VoIP模擬電話適配器研究與實現

    基于單DSP的VoIP模擬電話適配器研究與實現:提出和實現了一種新穎的基于單個通用數字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限,通常適于運算密集型應用,不適宜控制密集型應用[5]。該系統高效利用單DSP的I/O和片內外存儲器資源,采用μC/OS-II嵌入式實時操作系統,支持SIP和TCP-UDP/IP協議,通過LAN或者寬帶接入,使普通電話機成為Internet終端,實現IP電話。該系統軟硬件結構緊湊高效,運行穩定,成本低,具有廣闊的應用前景。關鍵詞:模擬電話適配器;IP電話;數字信號處理器;μC/OS-II 【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II Research and Implementation of VoIPATA Based on Single DSP

    標簽: VoIP DSP 模擬電話 適配器

    上傳時間: 2013-11-20

    上傳用戶:Wwill

  • 基于單片機的步進電機開環控制系統

    基于單片機的步進電機開環控制系統:通過ATMEL89C51單片機對步進電機進行控制,主要介紹了步進電機控制器、驅動電路和LED顯示電路的設計,實現了步進電機的開環控制。在步進電機控制器的設計中,重點闡述了脈沖產生電路以及對速度的控制。該系統具有成本低、控制方便的特點。關鍵詞: 單片機; 步進電機; 開環控制 Abstract: The design using ATMEL89C51 single chip to control the step2motor with its controller, driving circuit and LED disp lay circuit to realize step motor open2loop controlwere introduced. For the controller in this design,the circuit to p roduce pulse and the speed controlwere expatiated emphatically. This system possesses features of lower cost, easier control.Key words: single ch ip; step2motor; open2loop con trol

    標簽: 單片機 步進電機 開環 控制系統

    上傳時間: 2013-10-13

    上傳用戶:cicizoe

  • 基于單片機的除塵控制器的設計

    基于單片機的除塵控制器的設計:介紹通用控制儀的硬件組成和軟件設計,闡述了系統的性能指標和功能特點。該產品功能完善,可靠性高,具有很好的應用前景。關鍵詞: 除塵器;通用控制儀;單片機;系統設計 Abstract: The hardware structure and the software design are introduced in this paper, and the performance index and the features of the system are expounded. It has comp rehensive functions, high reliability and good app lication.Key words: dust catcher; universal controller; microcontroller; system design

    標簽: 單片機 除塵 控制器

    上傳時間: 2013-11-16

    上傳用戶:ming52900

  • 可編程自動控制控制跑馬燈

    這一顆,我們學習如何讓跑馬燈自動按照我們預定的順序進行。這種控制在工控場合經常用到。這個程序里,我們預先定義了一個變化的順序speedcode,每跑一圈燈就根據預定設置的表格數據來決定下一圈的跑馬速度。這樣我們就實現了按照預定的順序自動變化運行。請看代碼:-----------------------------------#define uchar unsigned char //定義一下方便使用#define uint unsigned int#define ulong unsigned long#include <reg52.h> //包括一個52 標準內核的頭文件sbit P10 = P1^0; //頭文件中沒有定義的IO 就要自己來定義了sbit P11 = P1^1;sbit P12 = P1^2;sbit P13 = P1^3;bit ldelay=0; //長定時溢出標記,預置是0uchar speed=10; //設置一個變量保存跑馬燈的移動速度uchar code speedcode[10]={3,1,5,12,3,20,2,10,1,4}; //10 個預定義的速度char code dx516[3] _at_ 0x003b;//這是為了仿真設置的//可編程自動控制跑馬燈void main(void) // 主程序{uchar code ledp[4]={0xfe,0xfd,0xfb,0xf7};//預定的寫入P1 的值uchar ledi; //用來指示顯示順序uchar i;RCAP2H =0x10; //賦T2 的預置值0x1000,溢出30 次就是1 秒鐘RCAP2L =0x00;TR2=1; //啟動定時器ET2=1; //打開定時器2 中斷EA=1; //打開總中斷

    標簽: 可編程 自動控制 控制 跑馬燈

    上傳時間: 2013-11-20

    上傳用戶:ming529

  • 水位監測報警系統原理

    摘要:本水位監測報警器使用5V低壓直流電源(也可以用3節5號電池代替)就可以對5~15厘米的水位進行監測,用LED顯示和數碼管顯示水位,并可以對不再此范圍內的水位發出報警。主要采用CD4066、74LS86、74LS32、CD4511芯片,再加上數碼管、蜂鳴器、發光二極管、電阻這些器件組成一個簡單而靈敏的監測報警電路,操作簡單,接通電源即可工作。因為大部分電路采用數字電路,所以本水位監測報警器還具有耗能低、準確性高的特點。關鍵字:譯碼電路    報警電路    監測電路 Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics. Keyword: Decoding circuit alarm circuit monitoring circuit

    標簽: 水位 監測報警 系統原理

    上傳時間: 2013-11-05

    上傳用戶:王慶才

  • 基于單片機控制的二氧化碳濃度測試計

    基于單片機控制的二氧化碳濃度測試計:基于CDM4161二氧化碳氣體濃度測試模塊以及ATtiny26單片機,提出了一種二氧化碳濃度測試計的設計方案。該方案具有硬件電路簡單、成本低、可靠性高、測量準確等優點,具有較高的實用價值。 Abstract: Abstract:A desigh scheme of CO2 concentration meter based on CDM4161carbon dioxide concentration test module and ATtiny26micro-controller is presented in this paper.The design scheme features simple hardware circuit,low-cost,high reli-ability,accurate measurement and it has a high practical value.

    標簽: 單片機控制 二氧化碳 測試

    上傳時間: 2013-11-14

    上傳用戶:zjwangyichao

  • Emulating a synchronous serial

    The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

    標簽: synchronous Emulating serial

    上傳時間: 2014-01-31

    上傳用戶:z1191176801

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    標簽: Bridge Memory Contr MPC

    上傳時間: 2013-10-08

    上傳用戶:18711024007

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