This application note demonstrates how to write an Inter Integrated Circuit bus driver (I2C) for the XA-S3 16-bitMicrocontroller from Philips Semiconductors.Not only the driver software is given. This note also contains a set of (example) interface routines and a smalldemo application program. All together it offers the user a quick start in writing a complete I2C system applicationwith the PXAS3x.The driver routines support interrupt driven single master transfers. Furthermore, the routines are suitable foruse in conjunction with real time operating systems.
上傳時間： 2013-11-02
上傳用戶：zw380105939
Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.
標簽： iButtons Reading Writing and
上傳時間： 2013-10-29
上傳用戶：long14578
The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.
上傳時間： 2013-11-19
上傳用戶：shirleyYim
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時間： 2013-10-22
上傳用戶：taiyang250072
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標簽： Base-Station Applications Single-Chip Transceiver
上傳時間： 2013-11-07
上傳用戶：songrui
為了在CDMA系統(tǒng)中更好地應用QDPSK數(shù)字調(diào)制方式，在分析四相相對移相（QDPSK)信號調(diào)制解調(diào)原理的基礎上，設計了一種QDPSK調(diào)制解調(diào)電路，它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺上，進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中，測試結(jié)果表明，調(diào)制電路能正確選相，解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致，達到了預期的設計要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
標簽： QDPSK CPLD 調(diào)制解調(diào) 電路設計
上傳時間： 2014-01-13
上傳用戶：qoovoop
很多不同的廠家生產(chǎn)各種型號的計算機，它們運行完全不同的操作系統(tǒng)，但TCP.IP協(xié)議族允許它們互相進行通信。這一點很讓人感到吃驚，因為它的作用已遠遠超出了起初的設想。T C P / I P起源于6 0年代末美國政府資助的一個分組交換網(wǎng)絡研究項目，到9 0年代已發(fā)展成為計算機之間最常應用的組網(wǎng)形式。它是一個真正的開放系統(tǒng)，因為協(xié)議族的定義及其多種實現(xiàn)可以不用花錢或花很少的錢就可以公開地得到。它成為被稱作“全球互聯(lián)網(wǎng)”或“因特網(wǎng)(Internet)”的基礎，該廣域網(wǎng)（WA N）已包含超過1 0 0萬臺遍布世界各地的計算機。本章主要對T C P / I P協(xié)議族進行概述，其目的是為本書其余章節(jié)提供充分的背景知識。 TCP.IP協(xié)議 縮略語 ACK (ACKnowledgment) TCP首部中的確認標志 API (Application Programming Interface) 應用編程接口 ARP (Address Resolution Protocol) 地址解析協(xié)議 ARPANET(Defense Advanced Research Project Agency NETwork) (美國)國防部遠景研究規(guī)劃局 AS (Autonomous System) 自治系統(tǒng) ASCII (American Standard Code for Information Interchange) 美國信息交換標準碼 ASN.1 (Abstract Syntax Notation One) 抽象語法記法1 BER (Basic Encoding Rule) 基本編碼規(guī)則 BGP (Border Gateway Protocol) 邊界網(wǎng)關(guān)協(xié)議 BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名 BOOTP (BOOTstrap Protocol) 引導程序協(xié)議 BPF (BSD Packet Filter) BSD 分組過濾器 CIDR (Classless InterDomain Routing) 無類型域間選路 CIX (Commercial Internet Exchange) 商業(yè)互聯(lián)網(wǎng)交換 CLNP (ConnectionLess Network Protocol) 無連接網(wǎng)絡協(xié)議 CRC (Cyclic Redundancy Check) 循環(huán)冗余檢驗 CSLIP (Compressed SLIP) 壓縮的S L I P CSMA (Carrier Sense Multiple Access) 載波偵聽多路存取 DCE (Data Circuit-terminating Equipment) 數(shù)據(jù)電路端接設備 DDN (Defense Data Network) 國防數(shù)據(jù)網(wǎng) DF (Don’t Fragment) IP首部中的不分片標志 DHCP (Dynamic Host Configuration Protocol) 動態(tài)主機配置協(xié)議 DLPI (Data Link Provider Interface) 數(shù)據(jù)鏈路提供者接口 DNS (Domain Name System) 域名系統(tǒng) DSAP (Destination Service Access Point) 目的服務訪問點 DSLAM (DSL Access Multiplexer) 數(shù)字用戶線接入復用器 DSSS (Direct Sequence Spread Spectrum) 直接序列擴頻 DTS (Distributed Time Service) 分布式時間服務 DVMRP (Distance Vector Multicast Routing Protocol) 距離向量多播選路協(xié)議 EBONE (European IP BackbONE) 歐洲I P主干網(wǎng) EOL (End of Option List) 選項清單結(jié)束 EGP (External Gateway Protocol) 外部網(wǎng)關(guān)協(xié)議 EIA (Electronic Industries Association) 美國電子工業(yè)協(xié)會 FCS (Frame Check Sequence) 幀檢驗序列 FDDI (Fiber Distributed Data Interface) 光纖分布式數(shù)據(jù)接口 FIFO (First In, First Out) 先進先出 FIN (FINish) TCP首部中的結(jié)束標志 FQDN (Full Qualified Domain Name) 完全合格的域名 FTP (File Transfer Protocol) 文件傳送協(xié)議 HDLC (High-level Data Link Control) 高級數(shù)據(jù)鏈路控制 HELLO 選路協(xié)議 IAB (Internet Architecture Board) Internet體系結(jié)構(gòu)委員會 IANA (Internet Assigned Numbers Authority) Internet號分配機構(gòu) ICMP (Internet Control Message Protocol) Internet控制報文協(xié)議 IDRP (InterDomain Routing Protocol) 域間選路協(xié)議 IEEE (Institute of Electrical and Electronics Engineering) （美國）電氣與電子工程師協(xié)會 IEN (Internet Experiment Notes) 互聯(lián)網(wǎng)試驗注釋 IESG (Internet Engineering Steering Group) Internet工程指導小組 IETF (Internet Engineering Task Force) Internet工程專門小組 IGMP (Internet Group Management Protocol) Internet組管理協(xié)議 IGP (Interior Gateway Protocol) 內(nèi)部網(wǎng)關(guān)協(xié)議 IMAP (Internet Message Access Protocol) Internet報文存取協(xié)議 IP (Internet Protocol) 網(wǎng)際協(xié)議 I RTF (Internet Research Task Force) Internet研究專門小組 IS-IS (Intermediate System to Intermediate System Protocol) 中間系統(tǒng)到中間系統(tǒng)協(xié)議 ISN (Initial Sequence Number) 初始序號 ISO (International Organization for Standardization) 國際標準化組織 ISOC (Internet SOCiety) Internet協(xié)會 LAN (Local Area Network) 局域網(wǎng) LBX (Low Bandwidth X) 低帶寬X LCP (Link Control Protocol) 鏈路控制協(xié)議 LFN (Long Fat Net) 長肥網(wǎng)絡 LIFO (Last In, First Out) 后進先出 LLC (Logical Link Control) 邏輯鏈路控制 LSRR (Loose Source and Record Route) 寬松的源站及記錄路由 MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干網(wǎng) MIB (Management Information Base) 管理信息庫 MILNET (MILitary NETwork) 軍用網(wǎng) MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t郵件擴充 MSL (Maximum Segment Lifetime) 報文段最大生存時間 MSS (Maximum Segment Size) 最大報文段長度 M TA (Message Transfer Agent) 報文傳送代理 MTU (Maximum Transmission Unit) 最大傳輸單元 NCP (Network Control Protocol) 網(wǎng)絡控制協(xié)議 NFS (Network File System) 網(wǎng)絡文件系統(tǒng) NIC (Network Information Center) 網(wǎng)絡信息中心 NIT (Network Interface Tap) 網(wǎng)絡接口栓（S u n公司的一個程序） NNTP (Network News Transfer Protocol) 網(wǎng)絡新聞傳送協(xié)議 NOAO (National Optical Astronomy Observatories) 國家光學天文臺 NOP (No Operation) 無操作 NSFNET (National Science Foundation NETwork) 國家科學基金網(wǎng)絡 NSI (NASA Science Internet) （美國）國家宇航局I n t e r n e t NTP (Network Time Protocol) 網(wǎng)絡時間協(xié)議 NVT (Network Virtual Terminal) 網(wǎng)絡虛擬終端 OSF (Open Software Foudation) 開放軟件基金 OSI (Open Systems Interconnection) 開放系統(tǒng)互連 OSPF (Open Shortest Path First) 開放最短通路優(yōu)先 PAWS (Protection Against Wrapped Sequence number) 防止回繞的序號 PDU (Protocol Data Unit) 協(xié)議數(shù)據(jù)單元 POSIX (Portable Operating System Interface) 可移植操作系統(tǒng)接口 PPP (Point-to-Point Protocol) 點對點協(xié)議 PSH (PuSH) TCP首部中的急迫標志 RARP (Reverse Address Resolution Protocol) 逆地址解析協(xié)議 RFC (Request For Comments) Internet的文檔，其中的少部分成為標準文檔 RIP (Routing Information Protocol) 路由信息協(xié)議 RPC (Remote Procedure Call) 遠程過程調(diào)用 RR (Resource Record) 資源記錄 RST (ReSeT) TCP首部中的復位標志 RTO (Retransmission Time Out) 重傳超時 RTT (Round-Trip Time) 往返時間 SACK (Selective ACKnowledgment) 有選擇的確認 SLIP (Serial Line Internet Protocol) 串行線路I n t e r n e t協(xié)議 SMI (Structure of Management Information) 管理信息結(jié)構(gòu) SMTP (Simple Mail Transfer Protocol) 簡單郵件傳送協(xié)議 SNMP (Simple Network Management Protocol) 簡單網(wǎng)絡管理協(xié)議 SSAP (Source Service Access Point) 源服務訪問點 SSRR (Strict Source and Record Route) 嚴格的源站及記錄路由 SWS (Silly Window Syndrome) 糊涂窗口綜合癥 SYN (SYNchronous) TCP首部中的同步序號標志 TCP (Transmission Control Protocol) 傳輸控制協(xié)議 TFTP (Trivial File Transfer Protocol) 簡單文件傳送協(xié)議 TLI (Transport Layer Interface) 運輸層接口 TTL (Ti m e - To-Live) 生存時間或壽命 TUBA (TCP and UDP with Bigger Addresses) 具有更長地址的T C P和U D P Telnet 遠程終端協(xié)議 UA (User Agent) 用戶代理 UDP (User Datagram Protocol) 用戶數(shù)據(jù)報協(xié)議 URG (URGent) TCP首部中的緊急指針標志 UTC (Coordinated Universal Time) 協(xié)調(diào)的統(tǒng)一時間 UUCP (Unix-to-Unix CoPy) Unix到U n i x的復制 WAN (Wide Area Network) 廣域網(wǎng) WWW (World Wide Web) 萬維網(wǎng) XDR (eXternal Data Representation) 外部數(shù)據(jù)表示 XID (transaction ID) 事務標識符 XTI (X/Open Transport Layer Interface) X/ O p e n運輸層接口
上傳時間： 2013-11-13
上傳用戶：tdyoung
機電類比法是一種把機械量通過一定的計算等效類比為電量的方法，其在對電子機械系統(tǒng)的分析中應用非常廣泛。它能夠把一個較復雜的機械系統(tǒng)類比為我們熟知的電路系統(tǒng)來進行分析，從而使問題的分析得到簡化。本文通過對振弦式傳感器的分析介紹了機電類比法，并對使用電路進行了相關(guān)的分析。 Summary：The electromechanical analogy is assort of analysis which is to analogize the mechanical system by using circuit system , it applied widely in the filed of analysis the electronic-mechanical system. The analysis can take a complex mechanical system analogous to a circuitry that we well-known, which can simplify the problems. In the paper, the electro-mechanical analogy method is briefly introduced by analysis the vibrating wire sensor，and have a correlation analysis about the circuit we used.關(guān)鍵詞： 機電類比法 振弦式傳感器 頻率 振蕩 反饋Keyword：electro-mechanical analogy method，vibrating wire sensor，frequency, oscillation, feedback 0 引言振弦式傳感器是屬于頻率式傳感器的一種。所謂頻率式傳感器就是能直接將被測量轉(zhuǎn)換為振動頻率信號的傳感器，這類傳感器一般是通過測量振弦、振筒、振梁、振膜等彈性振體或石英晶體諧振器的固有諧振頻率來達到測量引起諧振頻率變化的被測非電量的目的，其也稱為諧振式傳感器[1]。在分析該類傳感器中，由于其涉及到頻率，就容易讓人聯(lián)想到在電子技術(shù)中接觸到的RLC振蕩電路。因此可以嘗試著用類比的方法使之對應起來分析,即機電類比法分析。
上傳時間： 2013-11-16
上傳用戶：paladin
The Maxim Integrated 71M6541-DB REV 3.0 Demo Board is a demonstration board for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo Board allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and overall system use.
上傳時間： 2013-11-06
上傳用戶：雨出驚人love
Abstract: Communication with 1-Wire slave devices requires a 1-Wire master. There are numerous ways to build a 1-Wire master (see reference design 4206, "Choosing the Right 1-Wire Master for Embedded Applications"). Thisdocument describes the DS1WM, a synthesizable 1-Wire master that can be implemented in an application-specificintegrated circuit (ASIC) or field-programmable gate array (FPGA).
上傳時間： 2014-12-22
上傳用戶：xanxuan
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