四位數(shù)碼管從一數(shù)到F,LED就向下移一位c語(yǔ)言代碼
標(biāo)簽: LED 數(shù)碼管 c語(yǔ)言 代碼
上傳時(shí)間: 2014-12-25
上傳用戶:1214209695
基于HT47C20L的R-F型低電壓八位Mask單片機(jī) HT47C20L 是8 位高性能精簡(jiǎn)指令集單片機(jī)。單指令周期和兩級(jí)流水線結(jié)構(gòu),使其適合高速應(yīng)用的場(chǎng)合。特別適用于帶LCD 的低功耗產(chǎn)品,例如:電子計(jì)算機(jī)、時(shí)鐘計(jì)數(shù)器、游戲產(chǎn)品、電子秤、玩具、溫度計(jì)、濕度計(jì)、體溫計(jì)、電容測(cè)量?jī)x,以及其它掌上型LCD 產(chǎn)品,尤其是電池供電的系統(tǒng)。
上傳時(shí)間: 2013-11-13
上傳用戶:assef
基于HT45R37V的低功耗C/R-F型八位OTP單片機(jī) HT45R37V 是一款低功耗C/R-F 型具有8 位高性能精簡(jiǎn)指令集的單片機(jī),專門(mén)為需要VFD 功能的產(chǎn)品而設(shè)計(jì)。作為一款C/R-F 型的單片機(jī),它可以連接9 個(gè)外部電容型或電阻型傳感器,并把它們的電容值或電阻值轉(zhuǎn)換成相應(yīng)的頻率進(jìn)行處理。此外,單片機(jī)帶有內(nèi)部A/D 轉(zhuǎn)換器,能夠直接與模擬信號(hào)相連接,且它還集成了一個(gè)雙通道的脈沖寬度調(diào)節(jié)器,用于控制外部的馬達(dá)和LED 燈等。這款單片機(jī)是專門(mén)為VFD 產(chǎn)品應(yīng)用而設(shè)計(jì)的,它能直接驅(qū)動(dòng)VFD 面板。
上傳時(shí)間: 2013-10-16
上傳用戶:packlj
基于HT45R37的低功耗C/R-F型八位OTP單片機(jī) HT45R37 是一款低功耗C/R-F 型具有8 位高性能精簡(jiǎn)指令集的單片機(jī)。作為一款C/R-F 型的單片機(jī),它可以連接16 個(gè)外部電容/電阻式傳感器,并把它們的電容值或電阻值轉(zhuǎn)換成相應(yīng)的頻率進(jìn)行處理。此外,單片機(jī)帶有內(nèi)部A/D 轉(zhuǎn)換器,能夠直接與模擬信號(hào)相連接,且它還集成了雙通道的脈沖寬度調(diào)節(jié)器,用于控制外部的馬達(dá)和LED 燈等。
上傳時(shí)間: 2013-11-23
上傳用戶:chenlong
HT45R35VC/R-F型八位OTP單片機(jī) HT45R35V 是一款C/R-F 型具有8 位高性能精簡(jiǎn)指令集的單片機(jī),專門(mén)為需要VFD 功能的產(chǎn)品而設(shè)計(jì)。 秉承HOLTEK MCU 一般特性,該單片機(jī)帶有暫停和喚醒功能,振蕩器選項(xiàng)等等,這些都保證使用者的應(yīng)用只需極少的外部元器件便可實(shí)現(xiàn)。這款單片機(jī)專門(mén)為直接與VFD 面板相連的VFD 應(yīng)用而設(shè)計(jì)。集成C/R-F 功能,外加功耗低、性能良好、I/O 使用靈活、成本低等優(yōu)勢(shì),使這款單片機(jī)可以廣泛應(yīng)用于VFD 相關(guān)產(chǎn)品中,例如家電定時(shí)產(chǎn)品,各種消費(fèi)產(chǎn)品,子系統(tǒng)控制器,其他家電應(yīng)用等方面。
上傳時(shí)間: 2013-11-07
上傳用戶:semi1981
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標(biāo)簽: MULTICHANNEL 5.5 TO RS
上傳時(shí)間: 2013-10-19
上傳用戶:ddddddd
SPMC75F2413A在三相交流感應(yīng)電機(jī)的開(kāi)環(huán)V/F控制的應(yīng)用:系統(tǒng)輸入電源電壓為AC110V/AC220V,經(jīng)全波整流后供系統(tǒng)使用。系統(tǒng)使用Sunplus公司的SPMC75F2413A產(chǎn)生AC三相異步電機(jī)的VVVF控制所需的SPWM信號(hào),并完成系統(tǒng)控制。使用三菱公司的智能功率模塊PS21865實(shí)現(xiàn)電機(jī)的功率驅(qū)動(dòng)。在AC220V輸入時(shí),系統(tǒng)最大能驅(qū)動(dòng)1.5KW的負(fù)載。系統(tǒng)的變頻區(qū)間為2Hz~200Hz。
標(biāo)簽: 2413A F2413 SPMC 2413
上傳時(shí)間: 2013-11-06
上傳用戶:924484786
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽: XAPP 740 AXI 互聯(lián)
上傳時(shí)間: 2013-11-14
上傳用戶:fdmpy
The Linux Programming Interface - A Linux and UNIX System
標(biāo)簽: Programming Linux Interface Handbook
上傳時(shí)間: 2013-11-10
上傳用戶:asdstation
PS2 PS3 Style Gampad Interface
標(biāo)簽: Interface Gampad Style PS2
上傳時(shí)間: 2014-01-12
上傳用戶:unmwq
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