Building a RISC System in an FPGA
上傳時間： 2013-09-04
上傳用戶：朗朗乾坤
Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
標簽： Implementation Recovery Receiver Software
上傳時間： 2013-09-05
上傳用戶：panpanpan
FPGA in the software radio
上傳時間： 2013-09-06
上傳用戶：lina2343
Ps_2 keyboard application with 8051 proteus simulation
標簽： application simulation keyboard proteus
上傳時間： 2013-09-25
上傳用戶：a67818601
Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we have always disputed this point of view. With PCB layout now offering\r\nautomation of both component placement and track routing, getting the des
標簽： schematic necessary creating dismiss
上傳時間： 2013-09-25
上傳用戶：baiom
Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.
上傳時間： 2013-11-17
上傳用戶：菁菁聆聽
Abstract: This application note describes how to design boost converters using the MAX17597 peakcurrent-mode controller. Boost converters can be operated in discontinuous conduction mode (DCM) orcontinuous conduction mode (CCM). This operating mode can affect the component choices, stress levelin power devices, and controller design. Formulas for calculating component values and ratingsare alsopresented.
上傳時間： 2013-11-16
上傳用戶：zcs023047
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上傳時間： 2013-10-25
上傳用戶：banyou
The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.
上傳時間： 2014-12-23
上傳用戶：變形金剛
Abstract: Perfection is relative and application specific. The perfect race car is not the car we use to commute to work. We need products for everyday use that are high quality, affordable, and solidly reliable. There will be times when we must use components that are not perfect, and this is when calibration becomes important. Calibration techniques reduce tolerances in imperfect manufacturing equipment while maintaining affordability.
標簽： 校準
上傳時間： 2013-10-09
上傳用戶：哈哈hah
