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  • Lakewood (MAXREFDES7#)3.3V Input, ±12V (±15V) Output Isolated Power Supply

    Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and hardware files are Included.

    標(biāo)簽: MAXREFDES Lakewood Isolated Output

    上傳時(shí)間: 2013-11-02

    上傳用戶(hù):fengzimili

  • Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

    Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are Included.

    標(biāo)簽: Riverside MAXREFDES Isolated Output

    上傳時(shí)間: 2013-11-16

    上傳用戶(hù):會(huì)稽劍客

  • 隔離電源設(shè)計(jì)手冊(cè)

    Abstract: This document details the Oceanside (MAXREFDES9#) subsystem reference design, a 3.3V to 15V input,±15V (±12V) output, isolated power supply. The Oceanside design includes a high-efficiency step-up controller, a36V H-bridge transformer driver for isolated supplies, a wide input range, and adjustable output low-dropout linearregulator (LDO). Test results and hardware files are Included.  

    標(biāo)簽: 隔離電源 設(shè)計(jì)手冊(cè)

    上傳時(shí)間: 2013-10-12

    上傳用戶(hù):jinyao

  • 信號(hào)源,調(diào)節(jié)器和電源電路分析

      Occasionally, we are tasked with designing circuitry for aspecific purpose. The request may have customer originsor it may be an in-house requirement. Alternately, a circuitmay be developed because its possibility is simply tooattractive to ignore1. Over time, these circuits accumulate,encompassing a wide and useful body of proven capabilities.They also represent substantial effort. These considerationsmake publication an almost obligatory propositionand, as such, a group of circuits is presented here. This isnot the first time we have displayed such wares and, giventhe encouraging reader response, it will not be the last2.Eighteen circuits are Included in this latest effort, roughlyarranged in the categories given in this publication’s title.They appear at the next paragraph.

    標(biāo)簽: 信號(hào)源 調(diào)節(jié)器 電源 電路分析

    上傳時(shí)間: 2013-11-12

    上傳用戶(hù):012345

  • MAX7456在可視倒車(chē)?yán)走_(dá)中的應(yīng)用

    為解決傳統(tǒng)可視倒車(chē)?yán)走_(dá)視頻字符疊加器結(jié)構(gòu)復(fù)雜,可靠性差,成本高昂等問(wèn)題,在可視倒車(chē)?yán)走_(dá)設(shè)計(jì)中采用視頻字符發(fā)生器芯片MAX7456。該芯片集成了所有用于產(chǎn)生用戶(hù)定義OSD,并將其插入視頻信號(hào)中所需的全部功能,僅需少量的外圍阻容元件即可正常工作。給出了以MAX7456為核心的可視倒車(chē)?yán)走_(dá)的軟、硬件實(shí)現(xiàn)方案及設(shè)計(jì)實(shí)例。該方案具有電路結(jié)構(gòu)簡(jiǎn)單、價(jià)格低廉、符合人體視覺(jué)習(xí)慣的特點(diǎn)。經(jīng)實(shí)際裝車(chē)測(cè)試,按該方案設(shè)計(jì)的可視倒車(chē)?yán)走_(dá)視場(chǎng)清晰、提示字符醒目、工作可靠,可有效降低駕駛員倒車(chē)時(shí)的工作強(qiáng)度、減少倒車(chē)事故的發(fā)生。 Abstract:  A new video and text generation chip,MAX7456,was used in the design of video parking sensor in order to simplify system structure,improve reliability and reduce cost. This chip Included all the necessary functions to generate user-defined OSDs and to add them into the video signals. It could be put into work with addition of just a small number of resistances and capacitors. This paper provided software and hardware implementation solutions and design example based on the chip. The system had the characteristics of simplicity in circuit structure,lower cost,and comfort for the nature of human vision. Loading road test demonstrates high video and text display quality and reliable performance,which makes the driver easy to see backward and reduces chance of accidents.

    標(biāo)簽: 7456 MAX 可視倒車(chē) 中的應(yīng)用

    上傳時(shí)間: 2013-12-10

    上傳用戶(hù):qiaoyue

  • 基于AVR單片機(jī)的船舶氣象儀測(cè)試系統(tǒng)的設(shè)計(jì)

       針對(duì)船舶氣象儀保障維修而設(shè)計(jì)的船舶氣象儀測(cè)試系統(tǒng),包括信息處理終端、主儀器檢測(cè)模塊、傳感器檢測(cè)模塊,各個(gè)模塊都采用基于AVR單片機(jī)的嵌入式系統(tǒng),模塊之間通過(guò)CAN總線(xiàn)進(jìn)行通信。結(jié)果表明,船舶氣象儀測(cè)試系統(tǒng)能夠快速檢測(cè)船舶氣象儀故障,與單純依靠人工方式排查故障相比,故障檢測(cè)時(shí)間縮短了60%以上。 Abstract:  The test system of ship meteorological instrument was developed to satisfy the maintenance of ship meteorological instruments,which composed of information processing terminal, testing module of main instrument and testing module of sensors. Each of these modules Included an embedded system based on microcontroller of AVR series and communicated with other module by CAN bus. The results show that the test system can judge the fault of ship meteorological instrument quickly and shorten the fault detection time as much as 60% compared with simple manual troubleshooting.

    標(biāo)簽: AVR 單片機(jī) 氣象儀 測(cè)試系統(tǒng)

    上傳時(shí)間: 2013-11-23

    上傳用戶(hù):stvnash

  • FET430PIF自制資料

    The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is Included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software Included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.

    標(biāo)簽: FET 430 PIF

    上傳時(shí)間: 2013-10-26

    上傳用戶(hù):fengweihao158@163.com

  • MSP430 USB JTAG自制資料

    The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required. The debugging tool interfaces the MSP430 to the Included integrated software environment and includes code to start your design immediately.  The MSP-FET430UIF development tools supports development with all MSP430 flash devices

    標(biāo)簽: JTAG MSP 430 USB

    上傳時(shí)間: 2013-10-28

    上傳用戶(hù):13691535575

  • USB Demonstration for DK3200 w

    The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is Included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.

    標(biāo)簽: Demonstration 3200 USB for

    上傳時(shí)間: 2014-02-27

    上傳用戶(hù):zhangzhenyu

  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It Included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2014-01-13

    上傳用戶(hù):qoovoop

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