In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your Intellectual property from others in an architecture where the part is externally programmed?
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