The DHRY program performs the dhrystone benchmarks on the 8051.
Dhrystone is a general-performance benchmark test originally
developed by Reinhold Weicker in 1984. This benchmark is
used to measure and compare the performance of different
computers or, in this case, the efficiency of the code
generated for the same computer by different compilers.
The test reports general performance in dhrystones per second.
Like most benchmark programs, dhrystone consists of standard
code and concentrates on string handling. It uses no
floating-point operations. It is heavily influenced by
hardware and software design, compiler and linker options,
code optimizing, cache memory, wait states, and integer
data types.
The DHRY program is available in different targets:
Simulator: Large Model: DHRY example in LARGE model
for Simulation
Philips 80C51MX: DHRY example in LARGE model
for the Philips 80C51MC
密碼學(xué)界牛人Victor Shoup用C++編寫數(shù)論類庫(kù)。
NTL is a high-performance, portable C++ library providing data structures and algorithms for arbitrary length integers for vectors, matrices, and polynomials over the integers and over finite fields and for arbitrary precision floating point arithmetic.
NTL provides high quality implementations of state-of-the-art algorithms for:
* arbitrary length integer arithmetic and arbitrary precision floating point arithmetic
* polynomial arithmetic over the integers and finite fields including basic arithmetic, polynomial factorization, irreducibility testing, computation of minimal polynomials, traces, norms, and more
* lattice basis reduction, including very robust and fast implementations of Schnorr-Euchner, block Korkin-Zolotarev reduction, and the new Schnorr-Horner pruning heuristic for block Korkin-Zolotarev
* basic linear algebra over the integers, finite fields, and arbitrary precision floating point numbers.
漢諾塔！！！
Simulate the movement of the Towers of Hanoi puzzle Bonus is possible for using animation
eg. if n = 2 A→B A→C B→C
if n = 3 A→C A→B C→B A→C B→A B→C A→C
200-MHz ARM920T Processor
• 16-kbyte Instruction Cache
• 16-kbyte Data Cache
• Linux® , Microsoft® Windows® CE-enabled MMU
• 100-MHz System Bus
• MaverickCrunch™ Math Engine
• Floating Point, Integer, and Signal Processing
Instructions
• Optimized for digital music compression and
decompression algorithms.
• Hardware interlocks allow in-line coding.
• MaverickKey™ IDs
• 32-bit Unique ID can be used for DRM-compliant
128-bit random ID.
• Integrated Peripheral Interfaces
• 32-bit SDRAM Interface
This library defines basic operation on polynomials, and contains also 3 different roots (zeroes)-finding methods that can handle quite large polynomials (>1000 coefs)
Implemented in ANSI C++ Templates. Handles all real and complex floating point types. Html doc is included.
ieee754的標(biāo)準(zhǔn)，原英文版的！Twenty years ago anarchy threatened floating-point arithmetic. Over a dozen commercially significant arithmetics
boasted diverse wordsizes, precisions, rounding procedures and over/underflow behaviors, and more were in the
works. “Portable” software intended to reconcile that numerical diversity had become unbearably costly to
develop.
Thirteen years ago, when IEEE 754 became official, major microprocessor manufacturers had already adopted it
despite the challenge it posed to implementors. With unprecedented altruism, hardware designers had risen to its
challenge in the belief that they would ease and encourage a vast burgeoning of numerical software. They did
succeed to a considerable extent. Anyway, rounding anomalies that preoccupied all of us in the 1970s afflict only
CRAY X-MPs — J90s now.
Topics Practices:
Programming and Numerical Methods
Practice 1: Introduction to C
Practice 2: Cycles and functions
First part cycles
Part Two: Roles
Practice 3 - Floating point arithmetic
Practice 4 - Search for roots of functions
Practice 5 - Numerical Integration
Practice 6 - Arrangements and matrices
Part One: Arrangements
Part II: Matrices
Practice 7 - Systems of linear equations
Practice 8 - Interpolation
Practice 9 - Algorithm Design Techniques
Implementation of GPU (Graphics Processing Unit) that rendered triangle based models. Our goal was to generate complex models with a movable camera. We wanted to be able to render complex images that consisted of hundreds to thousands of triangles. We wanted to apply interpolated shading on the objects, so that they appeared more
smooth and realisitc, and to have a camera that orbitted around the object, which allowed us to
look arond the object with a stationary light source. We chose to do this in hardware, because our initial implementation using running software on the NIOS II processor was too slow. Implementing parallelism in hardware is also easier to do than in software, which allows for more efficiency. We used Professor Land s floating point hardware, which allowed us to do calculations efficiency, which is essential to graphics.
