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  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component LEVEL orat the conceptual system LEVEL. The assembly and sub-assembly LEVELs have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    標簽: Modelling Guide Navy VHDL

    上傳時間: 2014-12-23

    上傳用戶:xinhaoshan2016

  • 電臺維修模擬訓(xùn)練系統(tǒng)設(shè)計方法研究

    Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures, follow the prompts trainers can locate the fault source and confirm the type to accomplish corresponding fault maintenance training. A training evaluation means is given to examining and evaluating the training performance. The system intuitively and vividly shows the fault maintenance process, it can not only be used in teaching, but also in daily maintenance training to efficiently improve the maintenance operation LEVEL. Graphical programming language LabVIEW is used to develop the system platform.

    標簽: 電臺維修 模擬訓(xùn)練 方法研究 系統(tǒng)設(shè)計

    上傳時間: 2013-11-19

    上傳用戶:3294322651

  • 基于CORDIC算法的高速ODDFS電路設(shè)計

    為了滿足現(xiàn)代高速通信中頻率快速轉(zhuǎn)換的需求,基于坐標旋轉(zhuǎn)數(shù)字計算(CORDIC,Coordinate Rotation Digital Computer)算法完成正交直接數(shù)字頻率合成(ODDFS,Orthogonal Direct Digital Frequency Synthesizer)電路設(shè)計方案。采用MATLAB和Xilinx System Generator開發(fā)工具搭建電路的系統(tǒng)模型,通過現(xiàn)場可編程門陣列(FPGA,F(xiàn)ield Programmable Gate Array)完成電路的寄存器傳輸級(RTL,Register Transfer LEVEL)驗證,仿真結(jié)果表明電路設(shè)計具有很高的有效性和可行性。

    標簽: CORDIC ODDFS 算法 電路設(shè)計

    上傳時間: 2013-11-09

    上傳用戶:hfnishi

  • 三電平變換器STATCOM空間矢量調(diào)制

    This paper presents a space vector modulation(SVM)-based switching strategy for a three-LEVEL neutral point clamped (NPC) converter that is adapted as a STATCOM.

    標簽: STATCOM 三電平 變換器 空間矢量

    上傳時間: 2013-10-20

    上傳用戶:zyt

  • 高速放大器技術(shù)

      This publication represents the largest LTC commitmentto an application note to date. No other application noteabsorbed as much effort, took so long or cost so much.This LEVEL of activity is justified by our belief that high speedmonolithic amplifiers greatly interest users.

    標簽: 高速放大器

    上傳時間: 2014-01-07

    上傳用戶:wfl_yy

  • 高速數(shù)字系統(tǒng)設(shè)計下載pdf

    高速數(shù)字系統(tǒng)設(shè)計下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform LEVEL. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The LEVEL of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical LEVEL, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標簽: 高速數(shù)字 系統(tǒng)設(shè)計

    上傳時間: 2013-10-26

    上傳用戶:縹緲

  • 射頻集成電路設(shè)計John Rogers(Radio Freq

    Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-LEVEL book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

    標簽: Rogers Radio John Freq

    上傳時間: 2014-12-23

    上傳用戶:han_zh

  • PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

    Abstract: Using a wafer-LEVEL package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.

    標簽: Considerations Guidelines and Design

    上傳時間: 2013-10-14

    上傳用戶:ysystc699

  • 數(shù)字與模擬電路設(shè)計技巧

    數(shù)字與模擬電路設(shè)計技巧IC與LSI的功能大幅提升使得高壓電路與電力電路除外,幾乎所有的電路都是由半導(dǎo)體組件所構(gòu)成,雖然半導(dǎo)體組件高速、高頻化時會有EMI的困擾,不過為了充分發(fā)揮半導(dǎo)體組件應(yīng)有的性能,電路板設(shè)計與封裝技術(shù)仍具有決定性的影響。 模擬與數(shù)字技術(shù)的融合由于IC與LSI半導(dǎo)體本身的高速化,同時為了使機器達到正常動作的目的,因此技術(shù)上的跨越競爭越來越激烈。雖然構(gòu)成系統(tǒng)的電路未必有clock設(shè)計,但是毫無疑問的是系統(tǒng)的可靠度是建立在電子組件的選用、封裝技術(shù)、電路設(shè)計與成本,以及如何防止噪訊的產(chǎn)生與噪訊外漏等綜合考慮。機器小型化、高速化、多功能化使得低頻/高頻、大功率信號/小功率信號、高輸出阻抗/低輸出阻抗、大電流/小電流、模擬/數(shù)字電路,經(jīng)常出現(xiàn)在同一個高封裝密度電路板,設(shè)計者身處如此的環(huán)境必需面對前所未有的設(shè)計思維挑戰(zhàn),例如高穩(wěn)定性電路與吵雜(noisy)性電路為鄰時,如果未將噪訊入侵高穩(wěn)定性電路的對策視為設(shè)計重點,事后反復(fù)的設(shè)計變更往往成為無解的夢魘。模擬電路與高速數(shù)字電路混合設(shè)計也是如此,假設(shè)微小模擬信號增幅后再將full scale 5V的模擬信號,利用10bit A/D轉(zhuǎn)換器轉(zhuǎn)換成數(shù)字信號,由于分割幅寬祇有4.9mV,因此要正確讀取該電壓LEVEL并非易事,結(jié)果造成10bit以上的A/D轉(zhuǎn)換器面臨無法順利運作的窘境。另一典型實例是使用示波器量測某數(shù)字電路基板兩點相隔10cm的ground電位,理論上ground電位應(yīng)該是零,然而實際上卻可觀測到4.9mV數(shù)倍甚至數(shù)十倍的脈沖噪訊(pulse noise),如果該電位差是由模擬與數(shù)字混合電路的grand所造成的話,要測得4.9 mV的信號根本是不可能的事情,也就是說為了使模擬與數(shù)字混合電路順利動作,必需在封裝與電路設(shè)計有相對的對策,尤其是數(shù)字電路switching時,ground vance noise不會入侵analogue ground的防護對策,同時還需充分檢討各電路產(chǎn)生的電流回路(route)與電流大小,依此結(jié)果排除各種可能的干擾因素。以上介紹的實例都是設(shè)計模擬與數(shù)字混合電路時經(jīng)常遇到的瓶頸,如果是設(shè)計12bit以上A/D轉(zhuǎn)換器時,它的困難度會更加復(fù)雜。

    標簽: 數(shù)字 模擬電路 設(shè)計技巧

    上傳時間: 2013-11-16

    上傳用戶:731140412

  • 電平轉(zhuǎn)換控制功率MOSFET

    Abstract: Some power architectures require the power supply sequencer (or system manager) to controldownstream power MOSFETs to allow power to flow into branch circuits. This application note explains howsystem power sequencing and LEVEL shifting can be accomplished using a low-voltage system manager

    標簽: MOSFET 電平轉(zhuǎn)換 控制 功率

    上傳時間: 2013-11-02

    上傳用戶:wys0120

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