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  • 基于DSP的車載雷達測速系統設計

    針對運行中火車測速運用多普勒效應采用DSP 設計雷達測速系統并闡述了其基本設計思想與工作原理給出系統硬件軟件設計結構和原理圖改善了原有光電測速精度提高了系統工作穩定性和可靠性經實驗證明DSP 采集板工作穩定測速效果好關鍵詞DSP; 雷達測速; 多普勒效應 On Board DSP-Based Radar Speed Measurement System TANG Wei, SUN Zhi-fang, CHEN Quan (Dept.of computer Science,Yangtze University,Jingzhou 434023,China)Abstract: This paper presents a DSP-based train speed measurement by using Doppler radar. The structure of the system is introduced.The hardware and software are also discussed.Key words: DSP; rader speed measurement; doppler principle

    標簽: DSP 車載 系統設計 雷達測速

    上傳時間: 2013-10-27

    上傳用戶:003030

  • 采用TüV認證的FPGA開發功能安全系統

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標簽: FPGA 安全系統

    上傳時間: 2013-11-05

    上傳用戶:維子哥哥

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    標簽: Solutions Analog Xilinx FPGAs

    上傳時間: 2013-11-01

    上傳用戶:a67818601

  • WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

    WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標簽: 369 WP 擴展式 處理平臺

    上傳時間: 2013-10-22

    上傳用戶:685

  • xilinx Zynq-7000 EPP產品簡介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    標簽: xilinx Zynq 7000 EPP

    上傳時間: 2013-11-01

    上傳用戶:dingdingcandy

  • PLD對FPGA數據加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標簽: FPGA PLD 數據加密

    上傳時間: 2013-11-06

    上傳用戶:wl9454

  • 基于FPGA+DSP模式的智能相機設計

    針對嵌入式機器視覺系統向獨立化、智能化發展的要求,介紹了一種嵌入式視覺系統--智能相機。基于對智能相機體系結構、組成模塊和圖像采集、傳輸和處理技術的分析,對國內外的幾款智能相機進行比較。綜合技術發展現狀,提出基于FPGA+DSP模式的硬件平臺,并提出智能相機的發展方向。分析結果表明,該系統設計可以實現脫離PC運行,完成圖像獲取與分析,并作出相應輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標簽: FPGA DSP 模式 智能相機

    上傳時間: 2013-10-24

    上傳用戶:bvdragon

  • 基于CPLD的QDPSK調制解調電路設計

    為了在CDMA系統中更好地應用QDPSK數字調制方式,在分析四相相對移相(QDPSK)信號調制解調原理的基礎上,設計了一種QDPSK調制解調電路,它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上,進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中,測試結果表明,調制電路能正確選相,解調電路輸出數據與QDPSK調制輸入數據完全一致,達到了預期的設計要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標簽: QDPSK CPLD 調制解調 電路設計

    上傳時間: 2014-01-13

    上傳用戶:qoovoop

  • 基于FPGA的光纖光柵解調系統的研究

     波長信號的解調是實現光纖光柵傳感網絡的關鍵,基于現有的光纖光柵傳感器解調方法,提出一種基于FPGA的雙匹配光纖光柵解調方法,此系統是一種高速率、高精度、低成本的解調系統,并且通過引入雙匹配光柵有效地克服了雙值問題同時擴大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設計,綜合考慮系統的解調精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標簽: FPGA 光纖光柵 解調系統

    上傳時間: 2014-07-24

    上傳用戶:caiguoqing

  • 8259 VHDL代碼

    a8259 可編程中斷控制 altera提供 The a8259 is designed to simplify the implementation of the interrupt interface  in 8088 and 8086  based microcomputer systems. The device is known as a programmable interrupt controller.  The a8259 receives and prioritizes up to 8 interrupts,  and in the cascade mode, this can be expanded up to  64 interrupts. An asynchronous reset and a clock input have been added to improve operation and reliability.

    標簽: 8259 VHDL 代碼

    上傳時間: 2014-11-29

    上傳用戶:zhyiroy

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