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VLAN(Virtual Local Area Network)的中文名為"虛擬局域網(wǎng)"。VLAN是一種將局域網(wǎng)設(shè)備從邏輯上劃分成一個個網(wǎng)段，從而實現(xiàn)虛擬工作組的新興數(shù)據(jù)交換技術(shù)。這一新興技術(shù)主要應(yīng)用于交換機(jī)和路由器中，但主流應(yīng)用還是在交換機(jī)之中。
標(biāo)簽：
VLAN
上傳時間：
2013-11-19
上傳用戶：comua
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The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate Local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
標(biāo)簽：
Cortex-M
1850
LPC
內(nèi)核微控制器
上傳時間：
2014-12-31
上傳用戶：zhuoying119
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The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate Local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
標(biāo)簽：
4300
LPC
ARM
雙核微控制器
上傳時間：
2013-10-28
上傳用戶：15501536189
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This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to
market. This allows FPGA users to design their own customized safety controllers and provides a significant
competitive advantage over traditional microcontroller or ASIC-based designs.
Introduction
The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in
cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas
around machines such as fast-moving robots, and distributed control systems in process automation equipment such
as those used in petrochemical plants.
The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of
electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing
safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was
developed in the mid-1980s and has been revised several times to cover the technical advances in various industries.
In addition, derivative standards have been developed for specific markets and applications that prescribe the
particular requirements on functional safety systems in these industry applications. Example applications include
process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC
62304), automotive (ISO 26262), power generation, distribution, and transportation.
圖Figure 1. Local Safety System
標(biāo)簽：
FPGA
安全系統(tǒng)
上傳時間：
2013-11-14
上傳用戶：zoudejile
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The PLB BRAM Interface Controller is a module thatattaches to the PLB (Processor Local Bus).
標(biāo)簽：
Block
BRAM
PLB
RAM
上傳時間：
2013-10-27
上傳用戶：Breathe0125
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The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
標(biāo)簽：
PCI-X
XAPP
DIMM
708
上傳時間：
2013-11-24
上傳用戶：18707733937
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Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant of Bagging algorithm, whose purpose is to improve accuracy of Local learners, such as kNN, through multi-model perturbing ensemble.
Reference: Z.-H. Zhou and Y. Yu. Ensembling Local learners through multimodal perturbation. IEEE Transactions on Systems, Man, and Cybernetics - Part B: Cybernetics, 2005, vol.35, no.4, pp.725-735.
標(biāo)簽：
Description
Randomness
Attribute
Filtered
上傳時間：
2015-04-10
上傳用戶：ynzfm
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一、安裝SQL數(shù)據(jù)庫
1、 打開Microsoft SQL Server 企業(yè)管理器
2、 建立一個新的數(shù)據(jù)庫，名稱為 XfokSite_Free (必須為這個名字)
3、選擇該數(shù)據(jù)庫，點(diǎn)擊鼠標(biāo)右鍵 -> 所有任務(wù) -> 還原數(shù)據(jù)庫 -> 從設(shè)備 -> 選擇設(shè)備 -> 添加 -> 選擇程序目錄下的數(shù)據(jù)庫里面的文件
二、安裝程序
1、如果程序沒有放在虛擬目錄下，請把所有文件放在網(wǎng)站根目錄下，否則會提示出錯。
三、設(shè)置
1、 用文本編輯器打開web.config
2、 找到<add key="SqlConnectionString" value="Data Source=(Local) Integrated Security=false Initial Catalog=XfokSite_Free User ID=xfok Password=xfok" />
紅色部分：數(shù)據(jù)庫服務(wù)器地址，如果為本地地址，請設(shè)置為(Local)，外部請直接修改為IP地址（不要加括號）
深紅部分：數(shù)據(jù)庫名稱
粉紅部分：SQL數(shù)據(jù)庫登陸用戶名
藍(lán)色部分：SQL數(shù)據(jù)庫登陸密碼
四、設(shè)置完畢！
直接在瀏覽器中敲入地址，來體驗一下心隨我動，網(wǎng)站建設(shè)超輕松的快感吧！
標(biāo)簽：
SQL
Microsoft
Server
數(shù)據(jù)庫
上傳時間：
2015-04-15
上傳用戶：璇珠官人
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剛剛學(xué)習(xí)jdbc數(shù)據(jù)庫，用jcreator編了一個小數(shù)據(jù)庫，還可以，通過了。
功能：能夠進(jìn)行添加數(shù)據(jù)、修改數(shù)據(jù)、查找數(shù)據(jù)、刪除數(shù)據(jù)、還可以上下翻頁！
注：
里面的東西還沒有進(jìn)行整理，多少還有一些凌亂。由于剛剛學(xué)，有些功能不知道，許多功能還是按照以前的知識進(jìn)行寫的，多少顯得笨拙！但也是一種解決的方法，可供初學(xué)者
參考。
說明文檔－－給初學(xué)者
1、首先把數(shù)據(jù)庫文件加入到SQLSERVER數(shù)據(jù)庫中DATA路徑下，
2、在SQL SERVER中：右鍵選中數(shù)據(jù)庫/所有任務(wù)/附加數(shù)據(jù)庫/找到需要附加數(shù)據(jù)庫的路徑
注意在這一步中，應(yīng)該都是對號，否則就要檢查是否文件名一致的問題
3、在管理工具/ODBC數(shù)據(jù)源管理器/系統(tǒng)DSN/添加SQLSERVER數(shù)據(jù)源/
記?。涸谶@一步中數(shù)據(jù)源起名是OO,本機(jī)服務(wù)器是(Local)，要更改默認(rèn)的數(shù)據(jù)庫為clientregister.
標(biāo)簽：
jdbc
數(shù)據(jù)庫
上傳時間：
2014-01-01
上傳用戶：gundamwzc
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是用jbuilder9做的一個簡單程序。單窗體，有添加刪除查詢更新幾個功能，用的是SQL Server數(shù)據(jù)庫。服務(wù)器名Local 用戶名sa 密碼hunterd.（不要忘了改數(shù)據(jù)源和導(dǎo)入數(shù)據(jù)）
第一次用java 和jbuilder編程，可能還有些問題吧。
標(biāo)簽：
jbuilder9
程序
上傳時間：
2013-12-16
上傳用戶：lyy1234
