RF CMOS Low-Phase-NOISE LC Oscillator Through Memory Reduction Tail Transistor
標(biāo)簽： Low-Phase-NOISE Oscillator Transistor Reduction
上傳時(shí)間： 2017-07-21
上傳用戶：66666
利用Matlab編程模擬phase noise對(duì)OFDM signal的影響,希望供大家參考,Error vector magnitude (EVM)
標(biāo)簽： magnitude Matlab signal vector
上傳時(shí)間： 2014-01-18
上傳用戶：wanghui2438
Fast settling-time added to the already conflicting requirements of narrow channel spacing and low phase noise lead to Fractional4 divider techniques for PLL synthesizers. We analyze discrete "beat-note spurious levels from arbitrary modulus divide sequences including those from classic accumulator methods.
標(biāo)簽： settling-time requirements conflicting already
上傳時(shí)間： 2016-04-14
上傳用戶：liansi
FEATURES400 MSPS internal clock speedIntegrated 10-bit DAC32-bit tuning wordPhase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output)Excellent dynamic performance>75 dB SFDR @ 160 MHz (±100 kHz offset) AOUTSerial I/O control1.8 V power supplySoftware and hardware controlled power-down48-lead TQFP/EP packageSupport for 5 V input levels on most digital inputsPLL REFCLK multiplier (4× to 20×)Internal oscillator; can be driven by a single crystalPhase modulation capabilityMultichip synchronization
上傳時(shí)間： 2014-12-04
上傳用戶：axin881314
A system simulation environment in Matlab/Simulink of RFID is constructed in this paper. Special attention is emphasized on the analog/RF circuit.Negative effects are concerned in the system model,such as phase noise of the local oscillator,TX-RX coupling,reflection of the environment, AWGN noise,DC offset,I/Q mismatch,etc.Performance of the whole system can be evaluated by changing the coding method,parameters of building blocks,and operation distance.Finally,some simulation results are presented in this paper.
標(biāo)簽： environment constructed simulation Simulink
上傳時(shí)間： 2014-01-09
上傳用戶：zhangliming420
A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
標(biāo)簽： new fractional-N synthesizer simplified
上傳時(shí)間： 2016-04-14
上傳用戶：hjshhyy
The JW? 7805 is a low noise low-dropout (LDO) voltage regulator with enable function that operates from 1.8V to 5.5V. It provides up to 300mA of output current and offers low-power operation in miniaturized packaging. JW7805 supports fixed output voltage 0.9V, 1.0V, 1.05V, 1.1V,1.2V, 1.3V, 1.35V, 1.5V, 1.8V, 1.85V, 2.1V, 2.2V, 2.3V, 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V,3.1V, 3.3V, 3.6V, 4.2V, 4.4V and 5.0V. The features of low quiescent current as low as 6uA and almost zero disable current are ideal for powering the battery equipment. JW7805’s low output noise and high PSRR are also friendly to RF systems.
標(biāo)簽： JW7805
上傳時(shí)間： 2022-05-06
上傳用戶：slq1234567890
The MAX2691 low-noise amplifier (LNA) is designed forGPS L2 applications. Designed in Maxim’s advancedSiGe process, the device achieves high gain andlow noise figure while maximizing the input-referred 1dBcompression point and the 3rd-order intercept point. TheMAX2691 provides a high gain of 17.5dB and sub 1dBnoise figure.
標(biāo)簽： Amplifier Low-Noise 2691 Band
上傳時(shí)間： 2014-12-04
上傳用戶：zaocan888
Study on High-efficiency and Low-noise Wireless Power Transmission for Solar Power Station/Satellite
標(biāo)簽： Power High-efficiency Transmission Low-noise
上傳時(shí)間： 2014-12-20
上傳用戶：kristycreasy
Study on High-efficiency and Low-noise Wireless Power Transmission for Solar Power Station/Satellite
標(biāo)簽： Power High-efficiency Transmission Low-noise
上傳時(shí)間： 2015-09-24
上傳用戶：teddysha
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