This software designs the student result management system m ay replace the tedious low effect the manual management, has realized the result management, the information management and the curriculum manages three big cores functions.
標簽： the management software designs
上傳時間： 2013-12-15
上傳用戶：kr770906
This software designs the document management system may replace the tedious low effect the manual management, has used the c language programming, realized the document input to loan, the information management and the data compilation three big cores function
標簽： the management software document
上傳時間： 2013-12-20
上傳用戶：yt1993410
Study on High-efficiency and Low-noise Wireless Power Transmission for Solar Power Station/Satellite
標簽： Power High-efficiency Transmission Low-noise
上傳時間： 2014-12-20
上傳用戶：kristycreasy
Study on High-efficiency and Low-noise Wireless Power Transmission for Solar Power Station/Satellite
標簽： Power High-efficiency Transmission Low-noise
上傳時間： 2015-09-24
上傳用戶：teddysha
Study on High-efficiency and Low-noise Wireless Power Transmission for Solar Power Station/Satellite
標簽： Power High-efficiency Transmission Low-noise
上傳時間： 2013-12-19
上傳用戶：zhaiyanzhong
This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are then adapted to work between systems with very long interconnect delays, by migrating a single-clock solution by Carloni et al. (1999, 2000, and 2001) (for “latency-insensitive” protocols) to mixed-timing domains. The new designs can be made arbitrarily robust with regard to metastability and interface operating speeds. Initial simulations for both latency and throughput are promising.
標簽： mixed-timing low-latency interfaces first-out
上傳時間： 2015-10-08
上傳用戶：dapangxie
Universal Serial Bus Implementers Forum Full and Low Speed Electrical and Interoperability Compliance Test Procedure
標簽： Interoperability Implementers Electrical Universal
上傳時間： 2015-11-18
上傳用戶：cc1915
LDPC碼譯碼相關文獻 Bounds on the maximum likelihood decoding error probability of low density parity check codes
標簽： probability likelihood decoding maximum
上傳時間： 2015-11-25
上傳用戶：wendy15
The MAX504/MAX515 are low-power, voltage-output, 10-bit digital-to-analog converters (DACs) specified for single +5V power-supply operation.用于DA轉換芯片選型
標簽： digital-to-analog voltage-output converters MAX
上傳時間： 2015-11-26
上傳用戶：541657925
This user’s manual describes SAMSUNG s S3C2440A 16/32-bit RISC microprocessor. SAMSUNG’s S3C2440A is designed to provide hand-held devices and general applications with low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2440A includes the following components.
標簽： S3C2440A SAMSUNG microprocessor describes
上傳時間： 2013-12-19
上傳用戶：nanxia
