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Low-latency

  • This paper presents several Low-latency mixed-timing FIFO (first-in–first-out) interfaces designs t

    This paper presents several Low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are then adapted to work between systems with very long interconnect delays, by migrating a single-clock solution by Carloni et al. (1999, 2000, and 2001) (for “latency-insensitive” protocols) to mixed-timing domains. The new designs can be made arbitrarily robust with regard to metastability and interface operating speeds. Initial simulations for both latency and throughput are promising.

    標簽: mixed-timing Low-latency interfaces first-out

    上傳時間: 2015-10-08

    上傳用戶:dapangxie

  • Embedded_Deep_Learning_-_Algorithms

    Although state of the art in many typical machine learning tasks, deep learning algorithmsareverycostly interms ofenergyconsumption,duetotheirlargeamount of required computations and huge model sizes. Because of this, deep learning applications on battery-constrained wearables have only been possible through wireless connections with a resourceful cloud. This setup has several drawbacks. First, there are privacy concerns. Cloud computing requires users to share their raw data—images, video, locations, speech—with a remote system. Most users are not willing to do this. Second, the cloud-setup requires users to be connected all the time, which is unfeasible given current cellular coverage. Furthermore, real-time applications require low latency connections, which cannot be guaranteed using the current communication infrastructure. Finally, wireless connections are very inefficient—requiringtoo much energyper transferredbit for real-time data transfer on energy-constrained platforms.

    標簽: Embedded_Deep_Learning Algorithms

    上傳時間: 2020-06-10

    上傳用戶:shancjb

  • MAX2691 L2 Band GPS Low-Noise Amplifier

      The MAX2691 low-noise amplifier (LNA) is designed forGPS L2 applications. Designed in Maxim’s advancedSiGe process, the device achieves high gain andlow noise figure while maximizing the input-referred 1dBcompression point and the 3rd-order intercept point. TheMAX2691 provides a high gain of 17.5dB and sub 1dBnoise figure.

    標簽: Amplifier Low-Noise 2691 Band

    上傳時間: 2014-12-04

    上傳用戶:zaocan888

  • ADC轉換器技術用語 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    標簽: Converter Defi ADC 轉換器

    上傳時間: 2013-11-12

    上傳用戶:pans0ul

  • 16kb/s Low Delay CELP 算法

    16kb/s Low Delay CELP 算法

    標簽: Delay CELP Low 16

    上傳時間: 2015-01-03

    上傳用戶:huangld

  • Low End Microchip PICs C函數

    Low End Microchip PICs C函數

    標簽: Microchip PICs Low End

    上傳時間: 2015-01-06

    上傳用戶:helmos

  • int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) f

    int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) float dGauss (float x, float sigma) float meanGauss (float x, float sigma) void hysteresis (int high, int low, IMAGE im, IMAGE mag, IMAGE oriim) void canny (float s, IMAGE im, IMAGE mag, IMAGE ori)

    標簽: IMAGE float int gauss

    上傳時間: 2015-01-30

    上傳用戶:杜瑩12345

  • Packet Capture with Libpcap and other Low Level Network Tricks.rar

    Packet Capture with Libpcap and other Low Level Network Tricks.rar

    標簽: Capture Libpcap Network Packet

    上傳時間: 2015-02-08

    上傳用戶:lx9076

  • H.263 文檔 DRAFT ITU-T Recommendation H.263 VIDEO CODING FOR LOW BITRATE COMMUNICATION

    H.263 文檔 DRAFT ITU-T Recommendation H.263 VIDEO CODING FOR LOW BITRATE COMMUNICATION

    標簽: Recommendation COMMUNICATION 263 BITRATE

    上傳時間: 2013-12-14

    上傳用戶:cursor

  • The CMUPA is designed to be a low bandwidth, highly flexible architecture .This is it s protocol.

    The CMUPA is designed to be a low bandwidth, highly flexible architecture .This is it s protocol.

    標簽: architecture bandwidth designed flexible

    上傳時間: 2014-01-16

    上傳用戶:1966640071

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