X-MAC, a low power MAC protocol for wireless sensor networks (WSNs). Standard MAC protocols developed for duty-cycled WSNs such as BMAC, which is the default MAC protocol for TinyOS, employ an extended preamble and preamble sampling.
標簽： MAC protocols Standard networks
上傳時間： 2014-01-13
上傳用戶：王楚楚
Low Power ISM-Transceiver of Chipcon/Texas-Instruments. Contents of the library are CC1000, CC1000-UCSP, CC1020, CC1050, CC1100, CC1110, CC1150, CC2430, CC2500, CC2510, CC2511 and CC2550. Eagle Cadsoft Library
標簽： Texas-Instruments ISM-Transceiver Contents Chipcon
上傳時間： 2017-09-11
上傳用戶：llandlu
AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."
標簽： single-chip developed threshold the
上傳時間： 2017-09-12
上傳用戶：shinesyh
AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."
標簽： single-chip developed threshold the
上傳時間： 2013-12-09
上傳用戶：invtnewer
Visual Basic Low Level Disk Acces
上傳時間： 2013-12-23
上傳用戶：王楚楚
The STi7105 uses state of the art process technology to provide an ultra low-cost, fully featured HD AVC decoder IC. It is a highly integrated system-on-chip suitable for STB markets across all networks (cable/satellite/DTT/x- DSL/IP) worldwide
標簽： technology low-cost featured process
上傳時間： 2013-12-22
上傳用戶：時代電子小智
Buffer low THD distortion and hi-impendance, Very wide frequency band.
標簽： hi-impendance distortion frequency Buffer
上傳時間： 2014-08-08
上傳用戶：dragonhaixm
PXA270 design guide low level primitives
標簽： primitives design guide level
上傳時間： 2014-06-30
上傳用戶：yxgi5
Low density parity check matrix
標簽： density parity matrix check
上傳時間： 2014-01-08
上傳用戶：yt1993410
現代社會信息量爆炸式增長，由于網絡、多媒體等新技術的發展，用戶對帶寬和速度的需求快速增加。并行傳輸技術由于時鐘抖動和偏移，以及PCB布線的困難，使得傳輸速率的進一步提升面臨設計的極限；而高速串行通信技術憑借其帶寬大、抗干擾性強和接口簡單等優勢，正迅速取代傳統的并行技術，成為業界的主流。 本論文針對目前比較流行并且有很大發展潛力的兩種高速串行接口電路——高速鏈路口和Rocket I/O進行研究，并以Xilinx公司最新款的Virtex-5 FPGA為研究平臺進行仿真設計。本論文的主要工作是以某低成本相控陣雷達信號處理機為設計平臺，在其中的一塊信號處理板上，進行了基于LVDS(Low VoltageDifferential Signal)技術的高速LinkPort(鏈路口)設計和基于CML(Current ModeLogic)技術的Rocket I/O高速串行接口設計。首先在FPGA的軟件中進行程序設計和功能、時序的仿真，當仿真驗證通過之后，重點是在硬件平臺上進行調試。硬件調試驗證的方法是將DSP TS201的鏈路口功能與在FPGA中的模擬高速鏈路口相連接，進行數據的互相傳送，接收和發送的數據相同，證明了高速鏈路口設計的正確性。并且在硬件調試時對Rocket IO GTP收發器進行回環設計，經過回環之后接收到的數據與發送的數據相同，證明了Rocket I/O高速串行接口設計的正確性。
上傳時間： 2013-04-24
上傳用戶：戀天使569
