本文論述了狀態機的verilog編碼風格,以及不同編碼風格的優缺點，Steve Golson's 1994 paper, "State MACHINE Design Techniques for Verilog and VHDL" [1], is agreat paper on state MACHINE design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state MACHINE types.This paper, "State MACHINE Coding Styles for Synthesis," details additional insights into stateMACHINE design including coding style approaches and a few additional tricks.
One of the strengths of Synplify is the Finite State MACHINE compiler. This is a powerfulfeature that not only has the ability to automatically detect state MACHINEs in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state MACHINE.
本文論述了狀態機的verilog編碼風格,以及不同編碼風格的優缺點，Steve Golson's 1994 paper, "State MACHINE Design Techniques for Verilog and VHDL" [1], is agreat paper on state MACHINE design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state MACHINE types.This paper, "State MACHINE Coding Styles for Synthesis," details additional insights into stateMACHINE design including coding style approaches and a few additional tricks.
One of the strengths of Synplify is the Finite State MACHINE compiler. This is a powerfulfeature that not only has the ability to automatically detect state MACHINEs in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state MACHINE.
JILRuntime A general purpose, register based virtual MACHINE (VM) that supports object-oriented features, reference counting (auto destruction of data as soon as it is no longer used, no garbage collection), exceptions (handled in C/C++ or virtual MACHINE code) and other debugging features. Objects and functions can be written in virtual MACHINE code, as well as in C or C++, or any other language that can interface to C object code. The VM is written for maximum performance and thus is probably not suitable for embedded systems where a small memory footprint is required. Possible uses of the VM are in game development, scientific research, or to provide a stand-alone, general purpose programming environment.
