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  • XAPP1023-測試Virtex-4 TEMAC系統的性能

    This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet(TEMAC) performance testing system using the ML405 board and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.

    標簽: Virtex TEMAC XAPP 1023

    上傳時間: 2013-11-11

    上傳用戶:saharawalker

  • NCV7356單線CANBUS收發器數據手冊

    The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data rateMode or a high-speed data download Mode for assembly line andservice data transfer operations. The high-speed Mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep Mode current.

    標簽: CANBUS 7356 NCV 單線

    上傳時間: 2013-10-24

    上傳用戶:s藍莓汁

  • lpc2292/lpc2294 pdf datasheet

    The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb Mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.

    標簽: lpc datasheet 2292 2294

    上傳時間: 2014-12-30

    上傳用戶:aysyzxzm

  • 射頻和微波系統的建模與仿真

    Abstract: This application note describes system-level characterization and Modeling techniques for radio frequency (RF) and microwavesubsystem components. It illustrates their use in a mixed-signal, mixed-Mode system-level simulation. The simulation uses an RF transmitterwith digital predistortion (DPD) as an example system. Details of this complex system and performance data are presented.

    標簽: 射頻 仿真 微波系統 建模

    上傳時間: 2013-12-18

    上傳用戶:onewq

  • ZigBee無線傳感網絡的路由協議研究

     為滿足無線網絡技術具有低功耗、節點體積小、網絡容量大、網絡傳輸可靠等技術要求,設計了一種以MSP430單片機和CC2420射頻收發器組成的無線傳感節點。通過分析其節點組成,提出了ZigBee技術中的幾種網絡拓撲形式,并研究了ZigBee路由算法。針對不同的傳輸要求形式選用不同的網絡拓撲形式可以盡大可能地減少系統成本。同時針對不同網絡選用正確的ZigBee路由算法有效地減少了網絡能量消耗,提高了系統的可靠性。應用試驗表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統的有線通信方式相比可以節約40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission Mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee Mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications Mode.

    標簽: ZigBee 無線傳感網絡 協議研究 路由

    上傳時間: 2013-10-09

    上傳用戶:robter

  • 差分電路中單端及混合模式S-參數的使用

    Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element Models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed Models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-Mode S-parameters,” addresses differential and common-Mode operation, as well as the conversion betweenthe two Modes of operation.This application note will explain the use of single-ended and mixed-Mode S-parameters, and the basicconcepts of microwave measurement calibration.

    標簽: 差分電路 單端 模式

    上傳時間: 2014-03-25

    上傳用戶:yyyyyyyyyy

  • LTC3207,LTC3207-1用戶指南

      The LTC®3207/LTC3207-1 is a 600mA LED/Camera driverwhich illuminates 12 Universal LEDs (ULEDs) and onecamera fl ash LED. The ULEDs are considered universalbecause they may be individually turned on or off, setin general purpose output (GPO) Mode, set to blink at aselected on-time and period, or gradate on and off at aselected gradation rate. This device also has an externalenable (ENU) pin that may be used to blink, gradate, orturn on/off the LEDs without using the I2C bus. This may beuseful if the microprocessor is in sleep or standby Mode. Ifused properly, these features may save valuable memoryspace, programming time, and reduce the I2C traffi c.

    標簽: 3207 LTC 用戶

    上傳時間: 2014-01-04

    上傳用戶:LANCE

  • Proteus教程中涉及的基本概念

      基本的編輯工具(GENERAL EDITING FACILITIES)   對象放置(Object Placement)   ISIS支持多種類型的對象,每一類型對象的具體作用和功能將在下一章給出。雖然類型不同,但放置對象的基本步驟都是一樣的。   放置對象的步驟如下(To place an object:)   1.根據對象的類別在工具箱選擇相應模式的圖標(Mode icon)。   2. Select the sub-Mode icon for the specific type of object.   2、根據對象的具體類型選擇子模式圖標(sub-Mode icon)。   3、如果對象類型是元件、端點、管腳、圖形、符號或標記,從選擇器里(selector)選擇你想要的對象的名字。對于元件、端點、管腳和符號,可能首先需要從庫中調出。   4、如果對象是有方向的,將會在預覽窗口顯示出來,你可以通過點擊旋轉和鏡象圖標來調整對象的朝向。   5、最后,指向編輯窗口并點擊鼠標左鍵放置對象。對于不同的對象,確切的步驟可能略有不同,但你會發現和其它的圖形編輯軟件是類似的,而且很直觀。   選中對象(Tagging an Object)   用鼠標指向對象并點擊右鍵可以選中該對象。該操作選中對象并使其高亮顯示,然后可以進行編輯。

    標簽: Proteus 教程 基本概念

    上傳時間: 2013-10-29

    上傳用戶:avensy

  • Xilinx FPGA集成電路的動態老化試驗

      3 FPGA設計流程   完整的FPGA 設計流程包括邏輯電路設計輸入、功能仿真、綜合及時序分析、實現、加載配置、調試。FPGA 配置就是將特定的應用程序設計按FPGA設計流程轉化為數據位流加載到FPGA 的內部存儲器中,實現特定邏輯功能的過程。由于FPGA 電路的內部存儲器都是基于RAM 工藝的,所以當FPGA電路電源掉電后,內部存儲器中已加載的位流數據將隨之丟失。所以,通常將設計完成的FPGA 位流數據存于外部存儲器中,每次上電自動進行FPGA電路配置加載。   4 FPGA配置原理    以Xilinx公司的Qpro Virtex Hi-Rel系列XQV100電路為例,FPGA的配置模式有四種方案可選擇:MasterSerial Mode,Slave Serial Mode,Master selectMAPMode,Slave selectMAP Mode。配置是通過芯片上的一組專/ 復用引腳信號完成的,主要配置功能信號如下:   (1)M0、M1、M2:下載配置模式選擇;   (2)CLK:配置時鐘信號;   (3)DONE:顯示配置狀態、控制器件啟動;

    標簽: Xilinx FPGA 集成電路 動態老化

    上傳時間: 2013-11-18

    上傳用戶:oojj

  • XAPP122 - Spartan-XL FPGA的Express配置

    Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express Mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to implement the configuration circui

    標簽: Spartan-XL Express XAPP FPGA

    上傳時間: 2015-01-02

    上傳用戶:nanxia

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