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Multi-class

  • SVMmulticlass: Multi-class classification. Learns to predict one of k mutually exclusive classes. Th

    SVMmulticlass: Multi-class classification. Learns to predict one of k mutually exclusive classes. This is probably the simplest possible instance of SVMstruct and serves as a tutorial example of how to use the programming interface.

    標(biāo)簽: classification SVMmulticlass Multi-class exclusive

    上傳時(shí)間: 2013-12-26

    上傳用戶:稀世之寶039

  • Multi-threaded Client/Server Socket Class

    Multi-threaded Client/Server Socket Class

    標(biāo)簽: Multi-threaded Client Server Socket

    上傳時(shí)間: 2014-01-03

    上傳用戶:xmsmh

  • 工控軟件組態(tài)王與單片機(jī)多機(jī)串口通訊的設(shè)計(jì)

    詳細(xì)介紹工控軟件組態(tài)王與單片機(jī)多機(jī)串口通訊的設(shè)計(jì)原理。分析組態(tài)王提供的直接與單片機(jī)串口通信方法的優(yōu)點(diǎn),給出系統(tǒng)基于RS-485總線傳輸?shù)慕涌陔娐吩韴D。根據(jù)組態(tài)王提供的通訊協(xié)議和單片機(jī)多機(jī)串口通訊的原理,給出程序設(shè)計(jì)流程與思路。 Abstract:  In this paper,the design principle of communication between multi-SCM and KingView by serial ports is described in detail.We analysis the advantage of method supplied by KingView,by which KingView can communicate with serial ports of SCM directly,and provide the system’s interface circuit based on the RS-485transmission line.We provide flow diagram of programming and thinking on the basis of communication protocol supplied by KingView and principle of communication among multi-SCM through serial ports.

    標(biāo)簽: 工控軟件 單片機(jī) 串口通訊 多機(jī)

    上傳時(shí)間: 2013-12-19

    上傳用戶:tecman

  • 微處理器dsPIC33F在微機(jī)保護(hù)裝置中的應(yīng)用

    數(shù)字信號處理器dsPIC33F集多通道高精度A/D轉(zhuǎn)換、多通訊模式、看門狗、CMOS Flash技術(shù)等于一體,其內(nèi)部可完成所有數(shù)據(jù)操作,實(shí)現(xiàn)總線不出芯片技術(shù)。將該處理器應(yīng)用于微機(jī)保護(hù)裝置,提出基于dsPIC33F微處理器的微機(jī)保護(hù)裝置的設(shè)計(jì)方案,給出相應(yīng)的接口電路與軟件流程。該設(shè)計(jì)方案結(jié)構(gòu)簡單,性價(jià)比及可靠性高,開發(fā)周期短,具有一定的實(shí)用推廣價(jià)值。所研制的微機(jī)保護(hù)裝置現(xiàn)場運(yùn)行效果良好。 Abstract:  The dsPIC33F microprocessor has a plentiful interior resource which contains multi-channel,high precision A/D converters,multi-communication module,watchdog,CMOS Flash technology,and so on.All data manipulations is accomplished interiorly.What is more,it makes the technology that bus does not go beyond the chip comes into practice.The paper put forwards a design scheme based on dsPIC33F microprocessor.The scheme has the advantages of simple structure,high reliability and shortened exploitation cycle.What is more,it has definite practicality and reference.The microcomputer protection device has been put into operation with excellent effects.

    標(biāo)簽: dsPIC 33F 33 微處理器

    上傳時(shí)間: 2013-11-16

    上傳用戶:開懷常笑

  • 基于單片機(jī)和FPGA的多功能計(jì)數(shù)器的設(shè)計(jì)

    以89S52單片機(jī)和EP1C6Q240C8型FPGA為控制核心的多功能計(jì)數(shù)器,是由峰值檢波、A/D轉(zhuǎn)換、程控放大、比較整形、移相網(wǎng)絡(luò)部分組成,可實(shí)現(xiàn)測量正弦信號的頻率、周期和相位差的功能。多功能計(jì)數(shù)器采用等精度的測量方法,可實(shí)現(xiàn)頻率為1Hz~10MHz、幅度為0.01~5Vrms的正弦信號的精確測頻,以及頻率為10Hz~100kHz、幅度為0.5~5Vrms的正弦信號精確測相。液晶顯示器能夠?qū)崟r(shí)顯示當(dāng)前信號的頻率、周期和相位差。該多功能計(jì)數(shù)器精度高,界面友好,實(shí)用性強(qiáng)。 Abstract:  A multi-function counter,which uses89S52MCU and EP1C6Q240C8FPGA as a control core,consists of peak detector,A/D conversion,program-controlled amplification,compared shaping and phase-shifting network part.The counter measures the frequency,period and phase of sinusoidal signal.With the equal precision method,the multi-function counter achieves the precise frequency measurement of the sinusoidal signal which its frequency is from1Hz to10MHz,its amplitude is from0.01Vrms to5Vrms,as well as the accurate phase measurement of the sinusoidal signal which its frequency is from10Hz to100kHz,its amplitude is from0.5Vrms to5Vrms.The LCD monitor real-time displays the frequency,period and phase difference of current signal.The multi-function counter features high precision,friendly interface,and strong practical.

    標(biāo)簽: FPGA 單片機(jī) 多功能 計(jì)數(shù)器

    上傳時(shí)間: 2013-11-15

    上傳用戶:gy592333

  • 基于C8051F020單片機(jī)的多路壓力測量儀

    介紹了一種基于C8051F020單片機(jī)的多路壓力測量儀。該測量儀選用電阻應(yīng)變式壓力傳感器采集壓力信號,并經(jīng)放大電路處理后送入C8051F020單片機(jī),再由C8051F020單片機(jī)內(nèi)部的A/D轉(zhuǎn)換器將采集到的壓力信號進(jìn)行模數(shù)轉(zhuǎn)化,然后分別對數(shù)據(jù)進(jìn)行存儲和顯示。該測量儀能測量6路壓力信號,并且各測量點(diǎn)都能單獨(dú)檢測和設(shè)置。由于采用了C8051F020單片機(jī),簡化了硬件電路,增強(qiáng)了抗干擾能力,使得測量儀具有測量精度高,沖擊小等特點(diǎn)。 Abstract:  A measurement apparatus for multi-channel pressure based on single chip microcomputer is introduced.It can measure 6 channels signal of the pressure,and the pressure measure points can be detection and located individually.The pressure signal sampling is obtained by resistor stress-type pressure sensors,the digital signals of 6 channels are collected through amplifying and adjustment circuit of pressure signals and internal integrated A/D converter of MCU.Finally,and it realizes the function to store and display data separately.C8051F020 was used to made hardware circuit simple,and it also enhanced the anti-interference ability.It features high precision and little impact.

    標(biāo)簽: C8051F020 單片機(jī) 多路 壓力

    上傳時(shí)間: 2013-11-16

    上傳用戶:yare

  • 基于雙ATmega128的安檢力學(xué)試驗(yàn)機(jī)設(shè)計(jì)

    針對當(dāng)前安檢力學(xué)試驗(yàn)機(jī)所能完成的試驗(yàn)種類單一、自動(dòng)化程度低等問題,提出一種以ATmega128單片機(jī)為核心控制器的安檢力學(xué)試驗(yàn)機(jī)的設(shè)計(jì)。詳細(xì)闡述了該安檢力學(xué)試驗(yàn)機(jī)各個(gè)組成部分的設(shè)計(jì)原理和方案,并且給出了各部分的軟件設(shè)計(jì)思想和操作流程。經(jīng)過大量測試試驗(yàn)表明:設(shè)計(jì)的安檢力學(xué)試驗(yàn)機(jī)可以完成多達(dá)十余種的力學(xué)安檢試驗(yàn),完全符合相關(guān)國家標(biāo)準(zhǔn),并且具有數(shù)據(jù)采集精度高、傳輸速度快、操作安全簡便等特點(diǎn),實(shí)現(xiàn)了安檢設(shè)備的多功能化、數(shù)字化和自動(dòng)化。 Abstract:  Currently, many mechanical security testing machines have only one function. The degree of automation of them is low. To solve those problems, a new kind of mechanical security testing machine, using ATmega128 micro-controller as its core controller, has been advanced. It describes the components of the machine. The principles and the scheme in the designing processes are presented in detail, and the software architecture and the operation processes of each part are given. After having done many testing, we have reached the following conclusions: the mechanical security testing machine presented can do over ten mechanical security tests complying with related national standards. It has high data acquisition accuracy and high transmission speed. The operation of the machine is simple and safe. In general, this machine is a multi-functional, highly automatic, digitalized security testing device.

    標(biāo)簽: ATmega 128 安檢 試驗(yàn)機(jī)

    上傳時(shí)間: 2013-11-05

    上傳用戶:a67818601

  • Xilinx UltraScale:新一代架構(gòu)滿足您的新一代架構(gòu)需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標(biāo)簽: UltraScale Xilinx 架構(gòu)

    上傳時(shí)間: 2013-11-13

    上傳用戶:瓦力瓦力hong

  • 基于以太網(wǎng)的虛擬示波器設(shè)計(jì)

    為提升虛擬儀器傳輸速率與實(shí)時(shí)性能,擴(kuò)展監(jiān)測范圍,在VC的軟件平臺上設(shè)計(jì)了一種全功能虛擬示波器。與傳統(tǒng)虛擬示波器相比,該系統(tǒng)采用嵌入式系統(tǒng)完成信號采集,采用工業(yè)以太網(wǎng)為傳輸介質(zhì),通過線性插值算法和多線程編程思想,實(shí)現(xiàn)波形顯示、參數(shù)計(jì)算、頻譜分析以及波形存儲及回放功能。實(shí)驗(yàn)結(jié)果表明,該虛擬示波器可以實(shí)現(xiàn)20 kHz采樣頻率下的波形精確顯示,達(dá)到預(yù)期的各項(xiàng)指標(biāo)。 Abstract:  o enhance the transfer rate and real-time of virtual instrument performance, expand scope of monitoring, this paper uses the VCs software platform to design a fully functional virtual oscilloscope. Compared with traditional virtual oscilloscope, this system adopts the embedded system to complete the data acquisition, industrial Ethernet as the transmission medium used by the linear interpolation algorithm and multi-threaded programming ideas, namely to achieve waveform display, parameter calculation, spectrum analysis and waveform storage and playback. Experimental results show that the virtual oscilloscope can accurately display the waveform with 20kHz sampling frequency, and achieve the desired targets.

    標(biāo)簽: 以太網(wǎng) 虛擬 波器設(shè)計(jì)

    上傳時(shí)間: 2013-11-25

    上傳用戶:wbwyl

  • 快速跳頻通信系統(tǒng)同步技術(shù)研究

    同步技術(shù)是跳頻通信系統(tǒng)的關(guān)鍵技術(shù)之一,尤其是在快速跳頻通信系統(tǒng)中,常規(guī)跳頻通信通過同步字頭攜帶相關(guān)碼的方法來實(shí)現(xiàn)同步,但對于快跳頻來說,由于是一跳或者多跳傳輸一個(gè)調(diào)制符號,難以攜帶相關(guān)碼。對此引入雙跳頻圖案方法,提出了一種適用于快速跳頻通信系統(tǒng)的同步方案。采用短碼攜帶同步信息,克服了快速跳頻難以攜帶相關(guān)碼的困難。分析了同步性能,仿真結(jié)果表明該方案同步時(shí)間短、虛警概率低、捕獲概率高,同步性能可靠。 Abstract:  Synchronization is one of the key techniques to frequency-hopping communication system, especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems, synchronization can be achieved by synchronization-head which can be used to carry the synchronization information, but for the fast frequency hopping, Because modulation symbol is transmitted by per hop or multi-hop, it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code, a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code, which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed, and simulation results show that the scheme has the advantages of shorter synchronization time, lower probability of false alarm, higher probability of capture and more reliable of synchronization.

    標(biāo)簽: 快速跳頻 同步技術(shù) 通信系統(tǒng)

    上傳時(shí)間: 2013-11-23

    上傳用戶:mpquest

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