闡述了一個由上位PC機和AT89C52下位單片機組成的主從分布式溫度巡回檢測系統。主從機采用RS-485 串行通訊標準進行通信，可在下位單片機實現基本的溫度數據巡回檢測基礎上，由上位PC機實現綜合處理功能或擴展為遠程操作。整個系統具有巡檢速度快，擴展性好的特點。
Abstract:
In this paper,a top PC and AT89C52 under-bit microcontrollers from the main component of the tour distributed temperature detection system is presented. Master and slave can use RS-485 serial communication standards for communications.Based on next-bit machine for basic goods temperature detected data Tour, the top can achieve the integrated treatment of PC functions or for the expansion of long-distance operation. The entire inspection system is fast, expansion.
針對當前安檢力學試驗機所能完成的試驗種類單一、自動化程度低等問題，提出一種以ATmega128單片機為核心控制器的安檢力學試驗機的設計。詳細闡述了該安檢力學試驗機各個組成部分的設計原理和方案，并且給出了各部分的軟件設計思想和操作流程。經過大量測試試驗表明：設計的安檢力學試驗機可以完成多達十余種的力學安檢試驗，完全符合相關國家標準，并且具有數據采集精度高、傳輸速度快、操作安全簡便等特點，實現了安檢設備的多功能化、數字化和自動化。
Abstract:
Currently， many mechanical security testing machines have only one function. The degree of automation of them is low. To solve those problems， a new kind of mechanical security testing machine， using ATmega128 micro-controller as its core controller， has been advanced. It describes the components of the machine. The principles and the scheme in the designing processes are presented in detail， and the software architecture and the operation processes of each part are given. After having done many testing， we have reached the following conclusions: the mechanical security testing machine presented can do over ten mechanical security tests complying with related national standards. It has high data acquisition accuracy and high transmission speed. The operation of the machine is simple and safe. In general， this machine is a multi-functional， highly automatic， digitalized security testing device.
NEC 16位MCU參考手冊
The 78K0R/IC3 is a 16-bit single-chip microcontroller that uses a 78K0R CPU core and incorporates peripheral functions, such as ROM/RAM, a multi-function timer, a multi-function serial interface, an A/D converter, a programmable gain amplifier (PGA), a comparator, a real-time counter, and a watchdog timer.
The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for
SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register,
8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption
and a high-impedance open-drain output pin, IO0.
The system master can enable the PCA9557’s I/O as either input or output by writing to
the configuration register. The system master can also invert the PCA9557 inputs by
writing to the active HIGH polarity inversion register. Finally, the system master can reset
the PCA9557 in the event of a time-out by asserting a LOW in the reset input.
The power-on reset puts the registers in their default state and initializes the
I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to
occur without de-powering the part.
The Philips family of Multiplexers and Switches consists of bi-directional translating switches controlled via the I2C or SMBus to fan out an upstream SCL/SDA pair to 2, 4 or 8 downstream channels of SCx/SDx pairs. The Multiplexers allow only one downstream channel to be selected at a time, while the Switches allow any individual downstream channel or combination of downstream channels to be selected, depending on the content of the programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels, and devices on the active downstream channels to communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. Combined interrupt output and hardware reset input are device options that are featured.
