-
msp430The LDC1312 and LDC1314 are 2- and 4-channel,
1? Easy-to-use – minimal configuration required
12-bit inductance to digital converters (LDCs) for
? Measure up to 4 sensors with one IC
inductive sensing solutions. With multiple channels ? Multiple channels support environmental and and support for remote sensing, the LDC1312 and aging compensation LDC1314 enable the performance and reliability benefits of inductive sensing to be realized at minimal? Multi-channel remote sensing provides lowest cost and power. The products are easy to use, onlysystem cost requiring that the sensor frequency be within 1 kHz ? Pin-compatible medium and high-resolution and 10 MHz to begin sensing. The wide 1 kHz to 10 options MHz sensor frequency range also enables use of very small PCB coils, further reducing sensing– LDC1312/4: 2/4-ch 12-bit LDC solution cost and size.– LDC1612/4: 2/4-ch 28
標簽：
msp
430
上傳時間：
2016-07-22
上傳用戶：tongmoonsky
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The AP2406 is a 1.5Mhz constant frequency, slope compensated current mode PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that runs from a single cell lithium-Ion (Li+) battery. The AP2406 can supply 600mA of load current from a 2.5V to 5.5V input voltage. The output voltage can be regulated as low as 0.6V. The AP2406 can also run at 100% duty cycle for low dropout operation, extending battery life in portable system. Idle mode operation at light loads provides very low output ripple voltage for noise sensitive applications.
The AP2406 is offered in a low profile (1mm) 5-pin, thin SOT package, and is available in an adjustable version and fixed output voltage of 1.2V, 1.5V and 1.8V
標簽：
2406
AP
技術手冊
上傳時間：
2017-02-23
上傳用戶：w124141
-
An acronym for Multiple-In, Multiple-Out, MIMO communication sends the same data as several signals
simultaneously through multiple antennas, while still utilizing a single radio channel. This is a form of
antenna diversity, which uses multiple antennas to improve signal quality and strength of an RF link. The
data is split into multiple data streams at the transmission point and recombined on the receive side by
another MIMO radio configured with the same number of antennas. The receiver is designed to take
into account the slight time difference between receptions of each signal, any additional noise or
interference, and even lost signals.
標簽：
Understanding_the_Basics_of_MIMO
上傳時間：
2020-06-01
上傳用戶：shancjb
-
基于FPGA設計的字符VGA LCD顯示實驗Verilog邏輯源碼Quartus工程文件+文檔說明,通過字符轉換工具將字符轉換為 8 進制 mif 文件存放到單端口的 ROM IP 核中，再從ROM 中把轉換后的數據讀取出來顯示到 VGA 上，FPGA型號Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;wire osd_hs;wire osd_vs;wire osd_de;wire[7:0] osd_r;wire[7:0] osd_g;wire[7:0] osd_b;assign vga_out_hs = osd_hs;assign vga_out_vs = osd_vs;assign vga_out_r = osd_r[7:3]; //discard low bit dataassign vga_out_g = osd_g[7:2]; //discard low bit dataassign vga_out_b = osd_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0 (clk ), .c0 (video_clk ));color_bar color_bar_m0( .clk (video_clk ), .rst (~rst_n ), .hs (video_hs ), .vs (video_vs ), .de (video_de ), .rgb_r (video_r ), .rgb_g (video_g ), .rgb_b (video_b ));osd_display osd_display_m0( .rst_n (rst_n ), .pclk (video_clk ), .i_hs (video_hs ), .i_vs (video_vs ), .i_de (video_de ), .i_data ({video_r,video_g,video_b} ), .o_hs (osd_hs ), .o_vs (osd_vs ), .o_de (osd_de ), .o_data ({osd_r,osd_g,osd_b} ));endmodule
標簽：
fpga
vga
lcd
上傳時間：
2021-12-18
上傳用戶：
-
基于FPGA設計的vga顯示測試實驗Verilog邏輯源碼Quartus工程文件+文檔說明，FPGA型號Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;assign vga_out_hs = video_hs;assign vga_out_vs = video_vs;assign vga_out_r = video_r[7:3]; //discard low bit dataassign vga_out_g = video_g[7:2]; //discard low bit dataassign vga_out_b = video_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0(clk), .c0(video_clk));color_bar color_bar_m0( .clk(video_clk), .rst(~rst_n), .hs(video_hs), .vs(video_vs), .de(video_de), .rgb_r(video_r), .rgb_g(video_g), .rgb_b(video_b));endmodule
標簽：
fpga
vga顯示
verilog
quartus
上傳時間：
2021-12-19
上傳用戶：kingwide
-
FPGA Verilog HDL設計溫度傳感器ds18b20溫度讀取并通過lcd1620和8位LED數碼管顯示的QUARTUS II 12.0工程文件，包括完整的設計文件.V源碼，可以做為你的學習及設計參考。module ds18b20lcd1602display ( Clk, Rst, DQ, //18B20數據端口 Txd, //串口發送端口 LCD_Data, //lcd LCD_RS, LCD_RW, LCD_En, SMData, //數碼管段碼 SMCom //數碼管位碼 );input Rst,Clk;output Txd,LCD_RS,LCD_En,LCD_RW;inout DQ;output[7:0] LCD_Data;output[7:0] SMData;output[3:0] SMCom;wire DataReady;//測溫完成信號wire [15:0] MeasureResult;//DS18B20測溫結果reg [15:0] Temperature;//產生LCD的位碼和段碼LCD1602Display Gen_LCD(.resetin(Rst),.clkin(Clk),.Data16bIn(Temperature),.lcd_data(LCD_Data),.lcd_rs(LCD_RS),.lcd_rw(LCD_RW),.lcd_e(LCD_En)/*,.SMCom(SMCom)*/);//DS18B20測溫和發送 DS18B20 TmpMeasureAndTx(.Rst(Rst),.Clk(Clk),.DQ(DQ),.Txd(Txd),.FinishFlag(DataReady),.Data16b(MeasureResult));//產生數碼管的位碼和段碼SMDisplay Gen_SM(.Rst(Rst),.
標簽：
fpga
verilog hdl
溫度傳感器
ds18b20
lcd1620
數碼顯示
上傳時間：
2022-01-30
上傳用戶：
-
AR0231AT7C00XUEA0-DRBR（RGB濾光）安森美半導體推出采用突破性減少LED閃爍 (LFM)技術的新的230萬像素CMOS圖像傳感器樣品AR0231AT，為汽車先進駕駛輔助系統(ADAS)應用確立了一個新基準。新器件能捕獲1080p高動態范圍(HDR)視頻，還具備支持汽車安全完整性等級B(ASIL B)的特性。LFM技術(專利申請中)消除交通信號燈和汽車LED照明的高頻LED閃爍，令交通信號閱讀算法能于所有光照條件下工作。AR0231AT具有1/2.7英寸(6.82 mm)光學格式和1928(水平) x 1208(垂直)有源像素陣列。它采用最新的3.0微米背照式(BSI)像素及安森美半導體的DR-Pix?技術，提供雙轉換增益以在所有光照條件下提升性能。它以線性、HDR或LFM模式捕獲圖像，并提供模式間的幀到幀情境切換。 AR0231AT提供達4重曝光的HDR，以出色的噪聲性能捕獲超過120dB的動態范圍。AR0231AT能同步支持多個攝相機，以易于在汽車應用中實現多個傳感器節點，和通過一個簡單的雙線串行接口實現用戶可編程性。它還有多個數據接口，包括MIPI(移動產業處理器接口)、并行和HiSPi(高速串行像素接口)。其它關鍵特性還包括可選自動化或用戶控制的黑電平控制，支持擴頻時鐘輸入和提供多色濾波陣列選擇。封裝和現狀：AR0231AT采用11 mm x 10 mm iBGA-121封裝，現提供工程樣品。工作溫度范圍為-40℃至105℃(環境溫度)，將完全通過AEC-Q100認證。
標簽：
圖像傳感器
上傳時間：
2022-06-27
上傳用戶：XuVshu
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數值分析高斯——列主元消去法主程序
說明如下：
％ a----input,matrix of coefficient
％ b----input,right vector
％ sol----output,returns the solution of linear equation
標簽：
input
coefficient
matrix
vector
上傳時間：
2017-01-01
上傳用戶：dancnc
-
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標簽：
Signal
Input
Fall
Rise
上傳時間：
2013-10-23
上傳用戶：copu
-
design LP,HP,B S digital Butterworth and Chebyshev
filter. All array has been specified internally,so user only need to
input f1,f2,f3,f4,fs(in hz), alpha1,alpha2(in db) and iband (to specify
the type of to design). This program output hk(z)=bk(z)/ak(z),k=1,2,...,
ksection and the freq.
標簽：
Butterworth
internally
Chebyshev
specified
上傳時間：
2015-11-08
上傳用戶：253189838
