基于OFDM的無線寬帶系統(tǒng)仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator.
Link-level simulator focus on a single-cell single-user scenario, where signal is transmitted from tx, and estimated at rx. Comparing the difference in tx/rx signal, the error rate can be found out. The output of the link-level simulator is the BLER/BER vs. SNR mapping table, that can be used for the system-level simulation.
System-level simulator focus on a multi-cell multi-user scenario. For the sake of simplicity, it takes the mapping table aquired in the link-level simulation, measure the actural SNR, and finds the corresponding error rate.
無線網(wǎng)卡驅(qū)動(dòng) 固件程序
There are currently 3 "programming generations" of Atheros 802.11
wireless devices (some of these have multiple hardware implementations
but otherwise appear identical to users):
5210 supports 11a only
5211 supports both 11a and 11b
5212 supports 11a, 11b, and 11g
To use the ATLTrace tool:
Debug an MFC or ATL project select Start from the Debug menu.
Select MFC/ATL Trace Tool in the Tools menu.
Expand the tree control list in the Trace List window. Here you will see the running application, any modules within that application, and the trace categories for each module.
Customize, for each process, module, and category, which information is displayed in the output window. The Trace level control in the Process group is related to the ATLTRACE2 level only those ATLTRACE2 messages with a level equal to or greater than the setting in the Trace level control will be displayed in the output window.
Select Apply to put your settings into effect.
You can save your settings, and load them the next time you debug the application use the Save and Load buttons.
RT2570芯片USB口無線網(wǎng)卡linux設(shè)備驅(qū)動(dòng)程序,有調(diào)試信息輸出的.-RT2570 chip USB wireless network card device driver linux, the output of debugging information.
PCI設(shè)計(jì)指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented
PCI Bus interface. This interface is available in 32-bit and 64-
bit versions, with support for multiple Xilinx FPGA device families. It
is designed to support both Verilog-HDL and VHDL. The design
examples in this book are provided in Verilog.
The Unisoft software module GERBER CONNECTION (CNC-BRIDGE). GERBER CONNECTION has all the features of VIEW-MARKUP and adds the ability to open multiple gerber file layers and add information to components. It is always the preference to use the CAD data vs. gerber data. If you do not have the CAD data then GERBER CONNECTION can help.
k-meansy算法源代碼。This directory contains code implementing the K-means algorithm. Source code
may be found in KMEANS.CPP. Sample data isfound in KM2.DAT. The KMEANS
program accepts input consisting of vectors and calculates the given
number of cluster centers using the K-means algorithm. Output is
directed to the screen.
Programs in the irregular grid design package described in this manual are used to carry out five main functions:
verification and adjustment of coastline and bathymetric data
preparation of an irregular triangular depth grid covering the domain to be modelled
production of a preliminary irregular triangular model grid with nodes suitably positioned for accurate and efficient numerical modelling
interactive checking and editing, including trimming and joining, of model grid
display and plotting of model output.
