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  • FREESCALE單片機的C編程教程

     1.The C Programming Language is a powerful, flexible andpotentially portable high-level programming language. 2.The C language may be used successfully to create a programfor an 8-bit MCU, but to produce the most efficient machinecode, the programmer Must carefully construct the C Languageprogram.3.The programmer Must not only create an efficient high leveldesign, but also pay attention to the detailed implementation.

    標簽: FREESCALE 單片機 編程 教程

    上傳時間: 2013-12-27

    上傳用戶:huanglang

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it Must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry Mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標簽: Signal Input Fall Rise

    上傳時間: 2013-10-23

    上傳用戶:copu

  • 介紹C16x系列微控制器的輸入信號升降時序圖及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it Must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    標簽: C16x 微控制器 輸入信號 時序圖

    上傳時間: 2014-04-02

    上傳用戶:han_zh

  • 87C576微控制器的在線編程

    The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that Must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.

    標簽: 87C576 微控制器 編程

    上傳時間: 2013-10-21

    上傳用戶:xiaozhiqban

  • 為您的FPGA選擇合適的電源

    Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply considerations that an engineer Must think through whendesigning a power supply for an FPGA.

    標簽: FPGA 電源

    上傳時間: 2013-11-10

    上傳用戶:iswlkje

  • Create a 1-Wire Master with Xilinx PicoBlaze

    Abstract: Designers who Must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.

    標簽: PicoBlaze Create Master Xilinx

    上傳時間: 2013-11-05

    上傳用戶:a6697238

  • 《器件封裝用戶向?qū)А焚愳`思產(chǎn)品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages Must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages Must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-10-22

    上傳用戶:ztj182002

  • 如何設(shè)計高性能基站(BTS)接收器

    Abstract: High-performance base-station (BTS) receivers Must meet half-IF spurious requirements, whichcan be achieved by using the proper RF mixer. To help engineers, this application note illustrates the

    標簽: BTS 如何設(shè)計 基站 性能

    上傳時間: 2013-10-17

    上傳用戶:daoxiang126

  • WP150-解決數(shù)兆兆位及更高的網(wǎng)絡(luò)挑戰(zhàn)

      In today’s world of modular networking and telecommunications design, it is becomingincreasingly difficult to keep alignment with the many different and often changing interfaces,both inter-board and intra-board. Each manufacturer has their own spin on the way in whichdevices are connected. To satisfy the needs of our customers, we Must be able to support alltheir interface requirements. For us to be able to make products for many customers, we Mustadopt a modular approach to the design. This modularity is the one issue that drives the majorproblem of shifting our bits from one modular interface to another.

    標簽: 150 WP 兆兆 網(wǎng)絡(luò)

    上傳時間: 2013-11-25

    上傳用戶:suicone

  • 基于(英蓓特)STM32V100的串口程序

    This example provides a description of how  to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you Must enter which Must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow:    - BaudRate = 115200 baud      - Word Length = 8 Bits    - One Stop Bit    - No parity    - Hardware flow control enabled (RTS and CTS signals)    - Receive and transmit enabled    - USART Clock disabled    - USART CPOL: Clock is active low    - USART CPHA: Data is captured on the second edge     - USART LastBit: The clock pulse of the last data bit is not output to                      the SCLK pin

    標簽: V100 STM 100 32V

    上傳時間: 2013-10-31

    上傳用戶:yy_cn

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