This application Note features 8-, 10-, and 12-bit dataacquisition components in various circuit configurations.The circuits include battery monitoring, temperature sensing,isolated serial interfaces, and microprocessor andmicrocontroller serial and parallel interfaces. Also includedare voltage reference circuits (Application Note 42contains more voltage reference circuits).
上傳時間： 2014-01-15
上傳用戶：zq70996813
This application Note is an overview discussion of theLinear Technology SPICE macromodel library. It assumeslittle if any prior knowledge of this software library or itshistory. However, it does assume familiarity with both theanalog simulation program SPICE (or one of its manyderivatives), and modern day op amps, including bipolar,JFET, and MOSFET amplifier technologies
上傳時間： 2013-11-14
上傳用戶：zhanditian
This publication represents the largest LTC commitmentto an application Note to date. No other application Noteabsorbed as much effort, took so long or cost so much.This level of activity is justified by our belief that high speedmonolithic amplifiers greatly interest users.
標簽： 高速放大器
上傳時間： 2014-01-07
上傳用戶：wfl_yy
This Note describes some of the unique IC design techniques incorporated into a fast, monolithic power buffer, the LT1010. Also, some application ideas are described such as capacitive load driving, boosting fast op amp output current and power supply circuits.
上傳時間： 2013-11-12
上傳用戶：671145514
A complete design for a data acquisition card for the IBM PC is detailed in this application Note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上傳時間： 2013-10-29
上傳用戶：BOBOniu
A tutorial on SAR type A/D converters, this Note contains detailed information on several 12-bit circuits. Comparator, clocking, and preamplifier designs are discussed. A final circuit gives a 12-bit conversion in 1.8µs. Appended sections explain the basic SAR technique and explore D/A considerations.
上傳時間： 2014-01-21
上傳用戶：釣鰲牧馬
This application Note describes a Linear Technology "Half-Flash" A/D converter, the LTC1099, being connected to a 256 element line scan photodiode array. This technology adapts itself to handheld (i.e., low power) bar code readers, as well as high resolution automated machine inspection applications..
上傳時間： 2013-11-21
上傳用戶：lchjng
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上傳時間： 2013-11-12
上傳用戶：pans0ul
Abstract: This application Note explains how to layout the MAX20021/MAX20022 automotive quad powermanagementICs (PMICs) to maximize performance and minimize emissions. Example images of a fourlayerlayout are provided.
上傳時間： 2013-11-19
上傳用戶：18711024007
Hyperlynx仿真應用:阻抗匹配.下面以一個電路設計為例，簡單介紹一下PCB仿真軟件在設計中的使用。下面是一個DSP硬件電路部分元件位置關系(原理圖和PCB使用PROTEL99SE設計)，其中DRAM作為DSP的擴展Memory(64位寬度，低8bit還經過3245接到FLASH和其它芯片)，DRAM時鐘頻率133M。因為頻率較高，設計過程中我們需要考慮DRAM的數據、地址和控制線是否需加串阻。下面，我們以數據線D0仿真為例看是否需要加串阻。模型建立首先需要在元件公司網站下載各器件IBIS模型。然后打開Hyperlynx,新建LineSim File(線路仿真—主要用于PCB前仿真驗證)新建好的線路仿真文件里可以看到一些虛線勾出的傳輸線、芯片腳、始端串阻和上下拉終端匹配電阻等。下面，我們開始導入主芯片DSP的數據線D0腳模型。左鍵點芯片管腳處的標志，出現未知管腳，然后再按下圖的紅線所示線路選取芯片IBIS模型中的對應管腳。 3http://bbs.elecfans.com/ 電子技術論壇 http://www.elecfans.com 電子發燒友點OK后退到“ASSIGN Models”界面。選管腳為“Output”類型。這樣，一樣管腳的配置就完成了。同樣將DRAM的數據線對應管腳和3245的對應管腳IBIS模型加上(DSP輸出，3245高阻，DRAM輸入)。下面我們開始建立傳輸線模型。左鍵點DSP芯片腳相連的傳輸線，增添傳輸線，然后右鍵編輯屬性。因為我們使用四層板，在表層走線，所以要選用“Microstrip”，然后點“Value”進行屬性編輯。這里，我們要編輯一些PCB的屬性，布線長度、寬度和層間距等，屬性編輯界面如下：再將其它傳輸線也添加上。這就是沒有加阻抗匹配的仿真模型(PCB最遠直線間距1.4inch，對線長為1.7inch)。現在模型就建立好了。仿真及分析下面我們就要為各點加示波器探頭了，按照下圖紅線所示路徑為各測試點增加探頭：為發現更多的信息，我們使用眼圖觀察。因為時鐘是133M，數據單沿采樣，數據翻轉最高頻率為66.7M，對應位寬為7.58ns。所以設置參數如下：之后按照芯片手冊制作眼圖模板。因為我們最關心的是接收端(DRAM)信號，所以模板也按照DRAM芯片HY57V283220手冊的輸入需求設計。芯片手冊中要求輸入高電平VIH高于2.0V，輸入低電平VIL低于0.8V。DRAM芯片的一個Note里指出，芯片可以承受最高5.6V，最低-2.0V信號(不長于3ns)：按下邊紅線路徑配置眼圖模板：低8位數據線沒有串阻可以滿足設計要求，而其他的56位都是一對一，經過仿真沒有串阻也能通過。于是數據線不加串阻可以滿足設計要求，但有一點需注意，就是寫數據時因為存在回沖，DRAM接收高電平在位中間會回沖到2V。因此會導致電平判決裕量較小，抗干擾能力差一些，如果調試過程中發現寫RAM會出錯，還需要改版加串阻。
上傳時間： 2013-11-05
上傳用戶：dudu121
