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ONE-channel

  • DS18B20中文資料

    FEATURES  Unique 1-Wire interface requires only one port pin for communication  Multidrop capability simplifies distributed temperature sensing applications  Requires no external components  Can be powered from data line. Power supply range is 3.0V to 5.5V  Zero standby power required  Measures temperatures from -55°C to +125°C. Fahrenheit equivalent is -67°F to +257°F  ±0.5°C accuracy from -10°C to +85°C  Thermometer resolution is programmable from 9 to 12 bits  Converts 12-bit temperature to digital word in 750 ms (max.)  User-definable, nonvolatile temperature alarm settings  Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition)  Applications include thermostatic controls, industrial systems, consumer products, thermometers, or any thermally sensitive system

    標簽: 18B B20 DS 18

    上傳時間: 2013-08-04

    上傳用戶:CHENKAI

  • 【經典的天線書籍】Practical Antenna Handbook

    ·基本信息Practical Antenna Handbook, 4th EditionbyJoseph J.Carr作者 Jeseph J. Carr 美國國防部航空電子(avionics)資深工程師one of the worlds leading and prolific writer and working scientist on electronics and radio, and an

    標簽: nbsp Practical Handbook Antenna

    上傳時間: 2013-04-24

    上傳用戶:yare

  • FPGA64的VHDL源代碼

    VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.

    標簽: FPGA VHDL 64 源代碼

    上傳時間: 2013-08-05

    上傳用戶:wwwe

  • VHDL,Verilog,System verilog比較

      本文簡單討論并總結了VHDL、Verilog,System verilog 這三中語言的各自特點和區別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.

    標簽: Verilog verilog System VHDL

    上傳時間: 2013-10-16

    上傳用戶:牛布牛

  • Verilog編碼中的非阻塞性賦值

      One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions

    標簽: Verilog 編碼 非阻塞性賦值

    上傳時間: 2013-10-17

    上傳用戶:tb_6877751

  • 模擬IC性能的權衡 模擬到數字化設計的挑戰

    Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.  

    標簽: 模擬IC 性能 模擬 數字化設計

    上傳時間: 2013-11-17

    上傳用戶:菁菁聆聽

  • MAX5713-MAX5715數據資料

    The MAX5713/MAX5714/MAX5715 4-channel, low-power,8-/10-/12-bit, voltage-output digital-to-analog converters(DACs) include output buffers and an internal referencethat is selectable to be 2.048V, 2.500V, or 4.096V. TheMAX5713/MAX5714/MAX5715 accept a wide supplyvoltage range of 2.7V to 5.5V with extremely low power(3mW) consumption to accommodate most low-voltageapplications. A precision external reference input allowsrail-to-rail operation and presents a 100kI (typ) load toan external reference.

    標簽: MAX 5713 5715 數據資料

    上傳時間: 2013-12-23

    上傳用戶:ArmKing88

  • MAX17600數據資料

     The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.

    標簽: 17600 MAX 數據資料

    上傳時間: 2013-12-20

    上傳用戶:zhangxin

  • MAX4968,MAX4968A數據手冊

    The MAX4968/MAX4968A are 16-channel, high-linearity,high-voltage, bidirectional SPST analog switches with18I (typ) on-resistance. The devices are ideal for use inapplications requiring high-voltage switching controlledby a low-voltage control signal, such as ultrasound imagingand printers. The MAX4968A provides integrated40kI (typ) bleed resistors on each switch terminal todischarge capacitive loads. Using HVCMOS technology,these switches combine high-voltage bilateral MOSswitches and low-power CMOS logic to provide efficientcontrol of high-voltage analog signals.

    標簽: 4968 MAX 數據手冊

    上傳時間: 2013-10-09

    上傳用戶:yepeng139

  • 消除電源旁路濾波噪聲

    Abstract: If sensitive analog systems are run from one supply without the sufficient bypassing to eliminate noise,

    標簽: 電源旁路 濾波噪聲

    上傳時間: 2013-11-23

    上傳用戶:qiulin1010

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