關(guān)于FPGA流水線設(shè)計(jì)的論文\r\nThis work investigates the use of very deep PIPELINEs for\r\nimplementing circuits in FPGAs, where each PIPELINE\r\nstage is limited to a single FPGA logic element (LE). The\r\narchitecture and VHDL design of a parameterized integer\r\na
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
為解決輸油管道溫度壓力參數(shù)實(shí)時(shí)監(jiān)測(cè)的問題，設(shè)計(jì)了以C8051F930單片機(jī)作為控制核心的超低功耗輸油管道溫度壓力遠(yuǎn)程監(jiān)測(cè)系統(tǒng)。現(xiàn)場(chǎng)儀表使用高精度電橋采集數(shù)據(jù)，通過433 MHz短距離無線通信網(wǎng)絡(luò)與遠(yuǎn)程終端RTU進(jìn)行通信，RTU通過GPRS網(wǎng)絡(luò)與PC上位機(jī)進(jìn)行遠(yuǎn)程數(shù)據(jù)傳輸，在上位機(jī)中實(shí)現(xiàn)數(shù)據(jù)存儲(chǔ)和圖形化界面顯示，從而實(shí)現(xiàn)輸油管道溫度壓力參數(shù)的實(shí)時(shí)監(jiān)測(cè)和異常報(bào)警。經(jīng)實(shí)驗(yàn)證明，該系統(tǒng)的12位數(shù)據(jù)采集精度滿足設(shè)計(jì)要求，漏碼率小于1%，正常工作時(shí)間超過5個(gè)月，能實(shí)時(shí)有效地監(jiān)測(cè)輸油管道的溫度壓力參數(shù)，節(jié)省大量人工成本，有效預(yù)防管道參數(shù)異常造成的經(jīng)濟(jì)損失和環(huán)境污染。
Abstract:
In order to solve the problems on real-time monitoring of PIPELINE temperature and pressure parameters， the ultra-low power remote PIPELINE temperature and pressure monitoring system was designed by using the single chip processor C8051F930 as the control core. The high-precision electric bridge was used in field instruments for data collection， the 433MHz short-range wireless communication network was used to make communication between field instrument and RTU， the GPRS was used by the RTU to transmit data to the PC host computer， and the data was stored and displayed in the PC host computer， so the real-time monitoring and exception alerts of PIPELINE temperature and pressure parameters were achieved. The experiment proves that the system of which error rate is less than 1% over five months working with the 12-bit data acquisition accuracy can effectively monitor the PIPELINE temperature and pressure parameters in real time， it saves a lot of labor costs and effectively prevents environmental pollution and economic losses caused by abnormal channel parameters.
文章提出了一種精簡(jiǎn)指令集8 位單片機(jī)中, 算術(shù)邏輯單元的工作原理。在此基礎(chǔ)上, 對(duì)比傳統(tǒng)PIC 方案、以及在ALU 內(nèi)部再次采用流水線作業(yè)的332 方案、44 方案, 并用Synopsys 綜合工具實(shí)現(xiàn)了它們。綜合及仿真結(jié)果表明, 根據(jù)該單片機(jī)系統(tǒng)要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面積僅比最小的332 方案增加1.6%。在分析性能差異的根本原因之后, 闡明了該方案的優(yōu)越性。關(guān)鍵詞: 單片機(jī), 精簡(jiǎn)指令集, 算術(shù)邏輯單元, 流水線
Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 PIPELINE scheme and 44 PIPELINE scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, PIPELINE
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage PIPELINE and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
