PCI-PCI 橋啟動時，一般需要從EEPROM 預讀取配置數(shù)據(jù)。更改EEPROM中的數(shù)據(jù)一般需要專用的燒結器，這給調(diào)試過程帶來不便。尤其是采用表貼封裝的EEPROM。本文以Intel 公司的Dec21554PCI-PCI 橋為例，介紹一種在線讀寫EEPROM 的方法。EEPROM選用的是ATMEL 公司生產(chǎn)的AT93LC66，4Kbit，按512×8bit 組織。
上傳時間： 2013-11-08
上傳用戶：trepb001
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
PCI-E是一種高速傳輸總線形式。
標簽： PCI-E 8622 數(shù)據(jù)采集卡
上傳時間： 2013-12-18
上傳用戶：宋桃子
PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊PCI-1734快速安裝使用手冊
上傳時間： 2013-10-22
上傳用戶：ssz1990
本文介紹一種基于PCI Express 總線的高速數(shù)據(jù)采集卡的設計方案及功能實現(xiàn)。給出系統(tǒng)的基本結構及單元組成，重點闡述系統(tǒng)硬件設計的關鍵技術和本地總線的控制邏輯，詳細探討了基于DriverWorks 的設備驅動程序的開發(fā)以及上層應用軟件的設計。該系統(tǒng)通過實踐驗證，可用于衛(wèi)星下行高速數(shù)據(jù)的接收并可適用于其他高速數(shù)據(jù)采集與處理系統(tǒng)。關鍵詞：PCI Express 總線 PCIE PEX8311 DMA 板卡驅動 隨著空間科學和空間電子學技術的飛速發(fā)展，空間科學實驗的種類和數(shù)量以及科學實驗所產(chǎn)生的數(shù)據(jù)量不斷增加。為了使地面接收處理系統(tǒng)能夠實時處理和顯示科學圖像數(shù)據(jù)，必須要設計出新的地面數(shù)據(jù)接收處理系統(tǒng)，實現(xiàn)大量高速數(shù)據(jù)的正確接收采集、處理以及存儲。為了滿足地面系統(tǒng)的要求，并為以后的計算機系統(tǒng)升級提供更廣闊的空間，本系統(tǒng)擬采用第三代I/O 互連技術PCI Express（簡稱PCI-E）作為本數(shù)據(jù)采集卡的進機總線形式。本文通過對PCI-E 總線專用接口芯片PLX 公司的PEX8311 性能分析，特別是對突發(fā)讀、寫和DMA讀操作的時序研究，設計出本地總線的可編程控制邏輯，并詳細討論了整個PCI-E 高速數(shù)據(jù)采集卡的硬件設計方案，以及WDM 驅動程序和上層應用程序的設計方法。
上傳時間： 2013-10-28
上傳用戶：tianyi996
瀏覽所有的PCI設備
上傳時間： 2015-01-03
上傳用戶：zsjinju
一個通過PCI卡向LED屏發(fā)送股票實時行情的系統(tǒng)
上傳時間： 2015-01-04
上傳用戶：498732662
sheerdns is a master DNS server whose zone records are stored on a One-Record-Per-File bases. Because of this, it is the simplest of any DNS to configure, the easiest to update, and the most efficient for networks that experience a lot of updates (for example master servers for dynamic IP address ranges). You never have to restart it; any updates are available immediately without having to notify the sheerdns process. 來源: http://freshmeat.net/projects/sheerdns/?topic_id=149 sheerdns是一個主DNS服務器，它的域記錄保存在一個One-Record-Per-File（每文件一個記錄）的庫中。因此，它是最簡單的DNS配制，最容易更新，對于有大量更新的網(wǎng)絡（如動態(tài)IP地址范圍的主服務器）來說它是最高效的。你不必重新啟動它，任何更新不用通知對應DNS進程就可以立即生效。
標簽： One-Record-Per-File sheerdns records Becaus
上傳時間： 2015-01-10
上傳用戶：wyc199288
PCI接口的Verilog源代碼
上傳時間： 2013-12-28
上傳用戶：l254587896
pci驅動程序的源代碼
上傳時間： 2015-01-12
上傳用戶：ljmwh2000
