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Computation on GPUs: From A Programmable Pipeline to an Efficient Stream Processor
標簽： Programmable Computation Efficient Processor
上傳時間： 2017-01-18
上傳用戶：330402686
Intel® PXA27x Processor Family Design Check List
標簽： Processor Family Design Intel
上傳時間： 2017-01-22
上傳用戶：cuibaigao
s3c6400 post Processor decoder
標簽： Processor s3c6400 decoder post
上傳時間： 2013-12-19
上傳用戶：lhc9102
本文是以數位訊號處理器DSP（Digital Singal Processor）之核心架構為主體的數位式溫度控制器開發，而其主要分為硬體電路與軟體程式兩部分來完成。而就硬體電路來看分為量測電路模組、DSP周邊電路及RS232通訊模組、輸出模組三個部分，其中在輸出上可分為電流輸出、電壓輸出以及binary command給加熱驅動裝置, RS232 除了可以與PC聯絡外也可以與具有CPU的熱能驅動器做命令傳輸。在計畫中分析現有工業用加熱驅動裝置和溫度曲線的關係，並瞭解其控制情況。軟體方面即是溫控器之中央處理器程式，亦即DSP控制程式，其中包括控制理論、感測器線性轉換程式、I/O介面及通訊協定相關程式。在控制法則上，提出一個新的加熱體描述模型，然後以前饋控制為主並輔以PID控制，得到不錯的控制結果。
標簽： Processor Digital Singal DSP
上傳時間： 2013-12-24
上傳用戶：zjf3110
Bootloading the TMS320VC5506/C5507/C5509 A digital signal Processor (DSP) through the on-chip universal serial bus (USB) peripheral is part of the standard bootloader provided on the device. This document describes the procedures for physically connecting the DSP to a USB host, invoking the USB bootloader on the DSP, generating the correct boot table file, and downloading the boot table from the host to the DSP via USB.
標簽： Bootloading the Processor digital
上傳時間： 2017-02-11
上傳用戶：腳趾頭
Separator Print Processor Sample
標簽： Separator Processor Sample Print
上傳時間： 2014-01-13
上傳用戶：teddysha
u-boot for S3c2443 Processor
標簽： Processor S3c2443 u-boot for
上傳時間： 2014-01-17
上傳用戶：
board type like smdk2443 ARM920T Processor
上傳時間： 2013-12-29
上傳用戶：陽光少年2016
The concept of the Altera Nios II embedded Processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II Processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
標簽： implementation Programmable Processor embedded
上傳時間： 2014-01-02
上傳用戶：dyctj
It contains a vhdl description of the external bus interface unit for 68000 Processor. currently only read and write cycle are supported
標簽： description currently interface Processor
上傳時間： 2017-03-16
上傳用戶：chenlong
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