This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting
coding, including finite field arithmetic, (Generalized) Low-Density Parity-
Check (LDPC) codes, and Reed-Solomon codes.
2.7V to 5.5V input voltage Range? Efficiency up to 96%
? 24V Boost converter with 12A switch
current Limit? 600KHz fixed Switching Frequency? Integrated soft-start? Thermal Shutdown? Under voltage Lockout? Support external LDO auxiliary power
supply? 8-Pin SOP-PP PackageAPPLICATIONSPortable Audio Amplifier Power SupplyPower BankQC 2.0/Type CWireless ChargerPOS Printer Power SupplySmall Motor Power Supply
