軟硬件資源的不斷成熟和完善，使得嵌入式系統(tǒng)應(yīng)用得到了十分迅猛的發(fā)展。另一方面，互聯(lián)網(wǎng)技術(shù)的發(fā)展，使得Internet逐漸深入到人們的日常生活中。嵌入式控制網(wǎng)絡(luò)與信息網(wǎng)絡(luò)的互聯(lián)不僅拓寬了控制系統(tǒng)的控制范圍，而且豐富了信息系統(tǒng)的內(nèi)容。因此，嵌入式系統(tǒng)與Internet相結(jié)合將成為嵌入式系統(tǒng)和互聯(lián)網(wǎng)絡(luò)發(fā)展的重要方向。 現(xiàn)階段，Internet規(guī)模的日益擴(kuò)大與IPv4地址匱乏之間的矛盾越來越突出。為解決IPv4網(wǎng)絡(luò)存在的各種問題而出現(xiàn)的IPv6協(xié)議具有海量的地址空間、優(yōu)化的路由算法、自動(dòng)化的地址配置等；同時(shí)還增加了對安全性、QoS等的良好支持。因此，Internet從IPv4過渡到IPv6是一種必然的趨勢。綜上，對IPv6協(xié)議進(jìn)行研究并將其引入嵌入式系統(tǒng)，實(shí)現(xiàn)嵌入式設(shè)備接入網(wǎng)絡(luò)的功能，具有較高的科研價(jià)值和現(xiàn)實(shí)意義。 本文在對嵌入式系統(tǒng)相關(guān)概念和嵌入式IPv6協(xié)議棧進(jìn)行介紹的基礎(chǔ)上，闡述了IPv6協(xié)議簇中核心協(xié)議的原理、報(bào)頭結(jié)構(gòu)和參數(shù)等。接著根據(jù)嵌入式TCP/IP協(xié)議棧的設(shè)計(jì)要點(diǎn)，提出嵌入式IPv6協(xié)議棧的總體設(shè)計(jì)，進(jìn)一步對協(xié)議棧的進(jìn)程模型、內(nèi)存管理、平臺無關(guān)性和通訊機(jī)制進(jìn)行了研究。然后對協(xié)議棧的裁剪和數(shù)據(jù)包的處理流程進(jìn)行分析，給出各模塊的詳細(xì)設(shè)計(jì)與實(shí)現(xiàn)，主要有IPv6模塊、ICMPv6模塊、鄰居發(fā)現(xiàn)(ND)模塊和UDP模塊。最后將協(xié)議棧嵌入到uC/OS-II操作系統(tǒng)中并搭建測試環(huán)境對IPv6協(xié)議棧進(jìn)行功能性測試，結(jié)果表明協(xié)議棧功能正常，可以完成基本的通訊功能。 協(xié)議棧根據(jù)嵌入式系統(tǒng)資源有限和應(yīng)用相對單一的情況進(jìn)行裁剪，采用分層結(jié)構(gòu)實(shí)現(xiàn)；同時(shí)在實(shí)現(xiàn)基本功能的前提下，為功能的擴(kuò)展提供了接口；另外，將協(xié)議棧與硬件、編譯器和操作系統(tǒng)相關(guān)的代碼獨(dú)立開來，實(shí)現(xiàn)了協(xié)議棧在不同平臺的良好移植。關(guān)鍵詞：嵌入式系統(tǒng)，因特網(wǎng)，ARM，IPv6，ICMPv6，鄰居發(fā)現(xiàn)協(xié)議
上傳時(shí)間： 2013-04-24
上傳用戶：lo25643
隨著計(jì)算機(jī)技術(shù)和網(wǎng)絡(luò)的飛速發(fā)展，流媒體技術(shù)的產(chǎn)生滿足了人們快速獲取多媒體信息的需求。它基于RTP/RTCP協(xié)議，運(yùn)用流式傳輸技術(shù)，可以使人們在最短的時(shí)間內(nèi)獲得想要的多媒體資訊。流媒體技術(shù)可廣泛應(yīng)用于視頻播放、視頻會(huì)議、遠(yuǎn)程教育等。嵌入式系統(tǒng)是當(dāng)前研究的另一個(gè)熱點(diǎn)。它具有低功耗、體積小、集成度高和專用性強(qiáng)等特點(diǎn)。嵌入式系統(tǒng)早期主要應(yīng)用于軍事及航空航天領(lǐng)域，隨著工nternet的發(fā)展，新型的嵌入式系統(tǒng)正朝著信息家電IA(InformationAppliance)和3C(Computer、Commtlnication&Consumer)產(chǎn)品方向發(fā)展。 因此，基于嵌入式設(shè)備的流媒體傳輸就是一個(gè)非常有意義的研究方向。本文基于南京某公司的實(shí)際產(chǎn)品項(xiàng)目“電梯多媒體項(xiàng)目”，將流媒體技術(shù)與嵌入式設(shè)備相結(jié)合，應(yīng)用于電梯之中，使多媒體資訊的傳播無處不在。 本文首先研究了流媒體傳輸?shù)南嚓P(guān)技術(shù)。深入研究了用于流媒體傳輸?shù)膶?shí)時(shí)傳輸與控制協(xié)議RTP/RTCP，掌握其結(jié)構(gòu)與規(guī)則；研究了實(shí)時(shí)傳輸QoS控制技術(shù)，分析現(xiàn)有的一些網(wǎng)絡(luò)傳輸控制方法，分析了流媒體與嵌入式系統(tǒng)的特點(diǎn)。 本文然后詳細(xì)分析了基于窗口的擁塞控制方法和基于速率的擁塞控制方法的原理和適用范圍，并改進(jìn)了其中基于發(fā)送端速率控制的擁塞控制方法，設(shè)計(jì)了一種基于接收端緩存和發(fā)送端速率控制相結(jié)合的流媒體傳輸控制方法。通過對接收端緩存剩余空間臨界點(diǎn)的設(shè)置與監(jiān)控，來輔助調(diào)節(jié)發(fā)送端的數(shù)據(jù)發(fā)送速率。它既可以避免網(wǎng)絡(luò)擁塞，又可以提高流媒體的傳輸質(zhì)量。 本文最后介紹了嵌入式Linux系統(tǒng)的移植，分析了網(wǎng)絡(luò)上開源的RTP/RTCP實(shí)現(xiàn)庫JRTPLIB，并結(jié)合本文實(shí)際需要，對RTCP中RR分組的結(jié)構(gòu)做了修改，以此為基礎(chǔ)設(shè)計(jì)了一個(gè)系統(tǒng)，實(shí)現(xiàn)本文所改進(jìn)的用于ARM流媒體傳輸控制的方法。
上傳時(shí)間： 2013-07-06
上傳用戶：ryb
·簡介：數(shù)據(jù)與計(jì)算機(jī)通信是當(dāng)今通信與計(jì)算機(jī)界的熱門話題。本書內(nèi)容豐富新穎，涉及最基本的數(shù)據(jù)通信原理、各種類型的計(jì)算機(jī)網(wǎng)絡(luò)以及多種網(wǎng)絡(luò)協(xié)議和應(yīng)用。這一版本增加的新內(nèi)容主要有：用雙絞線進(jìn)行寬帶接入的xDSL技術(shù)、千兆位以太網(wǎng)和100Mb／s以太網(wǎng)、可用比特率ABR服務(wù)和機(jī)制、TCP的擁塞控制、IP組播技術(shù)、Internet中的綜合服務(wù)、區(qū)分服務(wù)，以及服務(wù)質(zhì)量QoS和資源預(yù)約協(xié)議RSVP等。此外，本書還包
標(biāo)簽： 數(shù)據(jù) 計(jì)算機(jī)通信
上傳時(shí)間： 2013-07-02
上傳用戶：moqi
·Color Image Processing: Methods and Applications，2007版新書With advances in image sensors, digital TV, image-enabled consumer electronics, and much more, color image processing is of paramount interest i
標(biāo)簽： nbsp Applications Processing Methods
上傳時(shí)間： 2013-06-19
上傳用戶：comua
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
標(biāo)簽： SerDes MAXX 9257 9258
上傳時(shí)間： 2014-01-24
上傳用戶：xingisme
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
標(biāo)簽： 25128 EEPRO CMOS CAT
上傳時(shí)間： 2013-11-15
上傳用戶：fklinran
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時(shí)間： 2013-10-22
上傳用戶：taiyang250072
The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers to control the configuration of the VxWorks kernel. Thisguide shows the steps required to build and configure a ML403 Embedded DevelopmentPlatform to boot and run the VxWorks RTOS. A VxWorks bootloader is created, programmedinto Flash, and used to boot the design. The concepts presented here can be scaled to anyPowerPC enabled development platform.
上傳時(shí)間： 2013-10-26
上傳用戶：agent
It would not be an exaggeration to say that semiconductor devices have transformed humanlife. From computers to communications to internet and video games these devices and the technologies they have enabled have expanded human experience in a way that is unique in history. Semiconductor devices have exploited materials, physics and imaginative applications to spawn new lifestyles. Of course for the device engineer, in spite of the advances, the challenges of reaching higher frequency, lower power consumption, higher power generation etc.
標(biāo)簽： 半導(dǎo)體器件 物理
上傳時(shí)間： 2013-10-28
上傳用戶：songnanhua
This example provides a description of how to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow: - BaudRate = 115200 baud - Word Length = 8 Bits - One Stop Bit - No parity - Hardware flow control enabled (RTS and CTS signals) - Receive and transmit enabled - USART Clock disabled - USART CPOL: Clock is active low - USART CPHA: Data is captured on the second edge - USART LastBit: The clock pulse of the last data bit is not output to the SCLK pin
上傳時(shí)間： 2013-10-31
上傳用戶：yy_cn
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